Searched refs:OPC_RISC_SYSTEM (Results 1 – 2 of 2) sorted by relevance
| /openbmc/qemu/target/riscv/ |
| H A D | instmap.h | 35 OPC_RISC_SYSTEM = (0x73), enumerator
172 OPC_RISC_ECALL = OPC_RISC_SYSTEM | (0x0 << 12),
173 OPC_RISC_EBREAK = OPC_RISC_SYSTEM | (0x0 << 12),
174 OPC_RISC_ERET = OPC_RISC_SYSTEM | (0x0 << 12),
175 OPC_RISC_MRTS = OPC_RISC_SYSTEM | (0x0 << 12),
176 OPC_RISC_MRTH = OPC_RISC_SYSTEM | (0x0 << 12),
177 OPC_RISC_HRTS = OPC_RISC_SYSTEM | (0x0 << 12),
178 OPC_RISC_WFI = OPC_RISC_SYSTEM | (0x0 << 12),
179 OPC_RISC_SFENCEVM = OPC_RISC_SYSTEM | (0x0 << 12),
181 OPC_RISC_CSRRW = OPC_RISC_SYSTEM | (0x1 << 12),
[all …]
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| H A D | cpu_helper.c | 1746 case OPC_RISC_SYSTEM: in riscv_transformed_insn()
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