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Searched refs:OPC_RISC_LOAD (Results 1 – 2 of 2) sorted by relevance

/openbmc/qemu/target/riscv/
H A Dinstmap.h30 OPC_RISC_LOAD = (0x03), enumerator
131 OPC_RISC_LB = OPC_RISC_LOAD | (0x0 << 12),
132 OPC_RISC_LH = OPC_RISC_LOAD | (0x1 << 12),
133 OPC_RISC_LW = OPC_RISC_LOAD | (0x2 << 12),
134 OPC_RISC_LD = OPC_RISC_LOAD | (0x3 << 12),
135 OPC_RISC_LBU = OPC_RISC_LOAD | (0x4 << 12),
136 OPC_RISC_LHU = OPC_RISC_LOAD | (0x5 << 12),
137 OPC_RISC_LWU = OPC_RISC_LOAD | (0x6 << 12),
H A Dcpu_helper.c1732 case OPC_RISC_LOAD: in riscv_transformed_insn()