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Searched refs:OPC_LD (Results 1 – 6 of 6) sorted by relevance

/openbmc/linux/arch/riscv/include/asm/
H A Dmodule.h59 #define OPC_LD 0x3003 macro
85 OPC_LD | (lo12 << 20) | (REG_T0 << 15) | (REG_T1 << 7), in emit_plt_entry()
/openbmc/qemu/target/mips/tcg/
H A Dmips16e_translate.c.inc402 gen_ld(ctx, OPC_LD, ry, 29, offset);
518 gen_ld(ctx, OPC_LD, ry, rx, offset);
733 gen_ld(ctx, OPC_LD, ry, rx, offset << 3);
H A Dtranslate.c108 OPC_LD = (0x37 << 26), enumerator
109 OPC_LDPC = OPC_LD | 0x5,
2054 case OPC_LD: in gen_ld()
14921 case OPC_LD: in decode_opc_legacy()
H A Dmicromips_translate.c.inc2945 mips32_op = OPC_LD;
/openbmc/qemu/tcg/riscv/
H A Dtcg-target.c.inc171 OPC_LD = 0x3003,
859 tcg_out_opc_imm(s, OPC_LD, rd, rd, 0);
974 case OPC_LD:
1011 tcg_out_ldst(s, OPC_LD, arg, arg1, arg2);
1851 tcg_out_opc_imm(s, OPC_LD, val, base, 0);
2000 tcg_out_ldst(s, OPC_LD, a0, a1, a2);
/openbmc/qemu/tcg/mips/
H A Dtcg-target.c.inc249 OPC_LD = 067 << 26,
556 tcg_out_opc_imm(s, OPC_LD, ret, tbreg, 0);
799 MIPSInsn opc = OPC_LD;
1380 tcg_out_opc_imm(s, OPC_LD, lo, base, 0);
1727 i1 = OPC_LD;