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Searched refs:NDBDR1 (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/arch/arm/include/asm/arch-pxa/
H A Dpxa-regs.h2342 #define NDBDR1 0x43100020 /* Data Controller Bad Block Register 1 */ macro
/openbmc/u-boot/drivers/mtd/nand/raw/
H A Dpxa3xx_nand.c45 #define NDBDR1 (0x20) /* Bad Block Register 1 */ macro