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Searched refs:MX7D_PAD_SD1_WP__GPIO5_IO1 (Results 1 – 10 of 10) sorted by relevance

/openbmc/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx7d-sbc-imx7.dts39 MX7D_PAD_SD1_WP__GPIO5_IO1 0x59 /* WP */
H A Dimx7d-pinfunc.h771 #define MX7D_PAD_SD1_WP__GPIO5_IO1 0x018C 0x03FC 0x0000 0x5 0x0 macro
H A Dimx7-mba7.dtsi483 MX7D_PAD_SD1_WP__GPIO5_IO1 0x7c
H A Dimx7d-nitrogen7.dts506 MX7D_PAD_SD1_WP__GPIO5_IO1 0x7d
H A Dimx7d-sdb.dts756 MX7D_PAD_SD1_WP__GPIO5_IO1 0x59 /* WP */
H A Dimx7-colibri.dtsi820 MX7D_PAD_SD1_WP__GPIO5_IO1 0x14 /* SODIMM 71 */
/openbmc/u-boot/board/toradex/colibri_imx7/
H A Dcolibri_imx7.c126 MX7D_PAD_SD1_WP__GPIO5_IO1 | MUX_PAD_CTRL(NO_PAD_CTRL),
/openbmc/u-boot/arch/arm/dts/
H A Dimx7d-sdb.dts123 MX7D_PAD_SD1_WP__GPIO5_IO1 0x59 /* WP */
H A Dimx7d-pinfunc.h775 #define MX7D_PAD_SD1_WP__GPIO5_IO1 0x018C 0x03FC 0x0000 0x5 0x0 macro
/openbmc/u-boot/arch/arm/include/asm/arch-mx7/
H A Dmx7d_pins.h869MX7D_PAD_SD1_WP__GPIO5_IO1 = IOMUX_PAD(0x03FC, 0x018C, 5, 0x0000, 0,… enumerator