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Searched refs:MSR_OFFCORE_RSP_0 (Results 1 – 4 of 4) sorted by relevance

/openbmc/linux/arch/x86/events/intel/
H A Dcore.c91 INTEL_UEVENT_EXTRA_REG(0x01b7, MSR_OFFCORE_RSP_0, 0xffff, RSP_0),
166 INTEL_UEVENT_EXTRA_REG(0x01b7, MSR_OFFCORE_RSP_0, 0xffff, RSP_0),
233 INTEL_UEVENT_EXTRA_REG(0x01b7, MSR_OFFCORE_RSP_0, 0x799ffbb6e7ull, RSP_0),
240 INTEL_UEVENT_EXTRA_REG(0x01b7, MSR_OFFCORE_RSP_0, 0x3f807f8fffull, RSP_0),
248 INTEL_UEVENT_EXTRA_REG(0x01b7, MSR_OFFCORE_RSP_0, 0x3fffff8fffull, RSP_0),
255 INTEL_UEVENT_EXTRA_REG(0x01b7, MSR_OFFCORE_RSP_0, 0x3fffff8fffull, RSP_0),
295 INTEL_UEVENT_EXTRA_REG(0x01b7, MSR_OFFCORE_RSP_0, 0x3fffffbfffull, RSP_0),
303 INTEL_UEVENT_EXTRA_REG(0x012a, MSR_OFFCORE_RSP_0, 0x3fffffffffull, RSP_0),
353 INTEL_UEVENT_EXTRA_REG(0x012a, MSR_OFFCORE_RSP_0, 0x3fffffffffull, RSP_0),
1664 INTEL_UEVENT_EXTRA_REG(0x01b7, MSR_OFFCORE_RSP_0, 0x768005ffffull, RSP_0),
[all …]
/openbmc/u-boot/arch/x86/include/asm/
H A Dmsr-index.h84 #define MSR_OFFCORE_RSP_0 0x000001a6 macro
/openbmc/linux/tools/arch/x86/include/asm/
H A Dmsr-index.h204 #define MSR_OFFCORE_RSP_0 0x000001a6 macro
/openbmc/linux/arch/x86/include/asm/
H A Dmsr-index.h219 #define MSR_OFFCORE_RSP_0 0x000001a6 macro