| /openbmc/linux/tools/testing/selftests/kvm/x86_64/ |
| H A D | tsc_msrs_test.c | 23 GUEST_ASSERT_EQ(rounded_rdmsr(MSR_IA32_TSC), val); in guest_code()
28 wrmsr(MSR_IA32_TSC, val); in guest_code()
29 GUEST_ASSERT_EQ(rounded_rdmsr(MSR_IA32_TSC), val); in guest_code()
36 GUEST_ASSERT_EQ(rounded_rdmsr(MSR_IA32_TSC), val); in guest_code()
41 GUEST_ASSERT_EQ(rounded_rdmsr(MSR_IA32_TSC), HOST_ADJUST + val); in guest_code()
51 GUEST_ASSERT_EQ(rounded_rdmsr(MSR_IA32_TSC), HOST_ADJUST + val); in guest_code()
60 wrmsr(MSR_IA32_TSC, val); in guest_code()
61 GUEST_ASSERT_EQ(rounded_rdmsr(MSR_IA32_TSC), val); in guest_code()
106 TEST_ASSERT_EQ(rounded_host_rdmsr(MSR_IA32_TSC), val); in main()
112 TEST_ASSERT_EQ(rounded_host_rdmsr(MSR_IA32_TSC), val); in main()
[all …]
|
| H A D | vmx_tsc_adjust_test.c | 68 wrmsr(MSR_IA32_TSC, l1_tsc - TSC_ADJUST_VALUE); in l2_guest_code()
83 wrmsr(MSR_IA32_TSC, rdtsc() - TSC_ADJUST_VALUE); in l1_guest_code()
|
| H A D | vmx_nested_tsc_scaling_test.c | 65 tsc_start = rdmsr(MSR_IA32_TSC); in check_tsc_freq()
67 tsc_end = rdmsr(MSR_IA32_TSC); in check_tsc_freq()
|
| H A D | tsc_scaling_sync.c | 57 vcpu_set_msr(vcpu, MSR_IA32_TSC, TEST_TSC_OFFSET); in run_vcpu()
|
| /openbmc/u-boot/arch/x86/include/asm/ |
| H A D | msr.h | 252 #define write_tsc(val1, val2) wrmsr(MSR_IA32_TSC, (val1), (val2))
|
| H A D | msr-index.h | 358 #define MSR_IA32_TSC 0x00000010 macro
|
| /openbmc/linux/tools/arch/x86/include/asm/ |
| H A D | msr-index.h | 759 #define MSR_IA32_TSC 0x00000010 macro
|
| /openbmc/qemu/target/i386/hvf/ |
| H A D | hvf.c | 333 hv_vcpu_enable_native_msr(cpu->accel->fd, MSR_IA32_TSC, 1); in hvf_arch_init_vcpu()
|
| H A D | x86_emu.c | 683 case MSR_IA32_TSC: in simulate_rdmsr()
795 case MSR_IA32_TSC: in simulate_wrmsr()
|
| /openbmc/linux/arch/x86/include/asm/ |
| H A D | msr-index.h | 782 #define MSR_IA32_TSC 0x00000010 macro
|
| /openbmc/linux/tools/testing/selftests/kvm/include/x86_64/ |
| H A D | processor.h | 1045 return msr != MSR_IA32_TSC; in is_durable_msr()
|
| /openbmc/qemu/target/i386/kvm/ |
| H A D | kvm.c | 313 ret = kvm_get_one_msr(cpu, MSR_IA32_TSC, &value); in kvm_get_tsc()
2423 msrs->entries[0].index = MSR_IA32_TSC; in kvm_arch_reset_parked_vcpu()
3978 kvm_msr_entry_add(cpu, MSR_IA32_TSC, env->tsc); in kvm_put_msrs()
4431 kvm_msr_entry_add(cpu, MSR_IA32_TSC, 0); in kvm_get_msrs()
4704 case MSR_IA32_TSC: in kvm_get_msrs()
|
| /openbmc/linux/arch/x86/kvm/vmx/ |
| H A D | nested.c | 955 if (msr_index == MSR_IA32_TSC) { in nested_vmx_get_vmexit_msr_value()
957 MSR_IA32_TSC); in nested_vmx_get_vmexit_msr_value()
2528 prepare_vmx_msr_autostore_list(&vmx->vcpu, MSR_IA32_TSC); in prepare_vmcs02_rare()
|
| H A D | vmx.c | 169 MSR_IA32_TSC,
7522 vmx_disable_intercept_for_msr(vcpu, MSR_IA32_TSC, MSR_TYPE_R); in vmx_vcpu_create()
|
| /openbmc/qemu/target/i386/ |
| H A D | cpu.h | 386 #define MSR_IA32_TSC 0x10 macro
|
| /openbmc/linux/arch/x86/kvm/ |
| H A D | x86.c | 1455 MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
3782 case MSR_IA32_TSC: in kvm_set_msr_common()
4113 case MSR_IA32_TSC: { in kvm_get_msr_common()
|
| H A D | emulate.c | 3242 ctxt->ops->get_msr(ctxt, MSR_IA32_TSC, &tsc); in em_rdtsc()
|