Searched refs:MSR_BIP (Results 1 – 5 of 5) sorted by relevance
| /openbmc/qemu/target/microblaze/ |
| H A D | helper.c | 171 assert(!(msr & (MSR_EIP | MSR_BIP))); in mb_cpu_do_interrupt()
195 msr |= MSR_BIP; in mb_cpu_do_interrupt()
260 && !(env->msr & (MSR_EIP | MSR_BIP)) in mb_cpu_exec_interrupt()
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| H A D | cpu.h | 59 #define MSR_BIP (1<<3) /* 0x008 */ macro
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| H A D | translate.c | 1155 tcg_gen_ori_i32(cpu_msr, cpu_msr, MSR_BIP); in DO_BCC()
1194 msr_to_set |= MSR_BIP; in trans_brki()
1519 tcg_gen_andi_i32(cpu_msr, cpu_msr, ~(MSR_VM | MSR_UM | MSR_BIP)); in do_rtb()
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| /openbmc/linux/arch/microblaze/include/asm/ |
| H A D | registers.h | 14 #define MSR_BIP (1<<3) /* 0x008 */ macro
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| /openbmc/linux/arch/microblaze/kernel/ |
| H A D | entry.S | 56 msrclr r0, MSR_BIP
60 msrset r0, MSR_BIP
99 andi r11, r11, ~MSR_BIP
105 ori r11, r11, MSR_BIP
253 ori r11, r11, MSR_EE | MSR_BIP; /* set EE and BIP */ \
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