Searched refs:MSK (Results 1 – 4 of 4) sorted by relevance
15 #define MSK(n) ((1 << (n)) - 1) macro281 #define GT_CPU_ENDIAN_MSK (MSK(1) << GT_CPU_ENDIAN_SHF)284 #define GT_CPU_WR_MSK (MSK(1) << GT_CPU_WR_SHF)292 #define GT_PCI_LD_MSK (MSK(15) << GT_PCI_LD_SHF)294 #define GT_PCI_HD_MSK (MSK(7) << GT_PCI_HD_SHF)296 #define GT_PCI_REMAP_MSK (MSK(11) << GT_PCI_REMAP_SHF)300 #define GT_CFGADDR_CFGEN_MSK (MSK(1) << GT_CFGADDR_CFGEN_SHF)304 #define GT_CFGADDR_BUSNUM_MSK (MSK(8) << GT_CFGADDR_BUSNUM_SHF)307 #define GT_CFGADDR_DEVNUM_MSK (MSK(5) << GT_CFGADDR_DEVNUM_SHF)310 #define GT_CFGADDR_FUNCNUM_MSK (MSK(3) << GT_CFGADDR_FUNCNUM_SHF)[all …]
12 #define MSK(n) ((1 << (n)) - 1) macro278 #define GT_CPU_ENDIAN_MSK (MSK(1) << GT_CPU_ENDIAN_SHF)281 #define GT_CPU_WR_MSK (MSK(1) << GT_CPU_WR_SHF)289 #define GT_PCI_LD_MSK (MSK(15) << GT_PCI_LD_SHF)291 #define GT_PCI_HD_MSK (MSK(7) << GT_PCI_HD_SHF)293 #define GT_PCI_REMAP_MSK (MSK(11) << GT_PCI_REMAP_SHF)297 #define GT_CFGADDR_CFGEN_MSK (MSK(1) << GT_CFGADDR_CFGEN_SHF)301 #define GT_CFGADDR_BUSNUM_MSK (MSK(8) << GT_CFGADDR_BUSNUM_SHF)304 #define GT_CFGADDR_DEVNUM_MSK (MSK(5) << GT_CFGADDR_DEVNUM_SHF)307 #define GT_CFGADDR_FUNCNUM_MSK (MSK(3) << GT_CFGADDR_FUNCNUM_SHF)[all …]
33 #define MSK(n) ((1ULL << (n)) - 1) macro109 #define GIC_SH_CONFIG_COUNTSTOP_MSK (MSK(1) << GIC_SH_CONFIG_COUNTSTOP_SHF)111 #define GIC_SH_CONFIG_COUNTBITS_MSK (MSK(4) << GIC_SH_CONFIG_COUNTBITS_SHF)113 #define GIC_SH_CONFIG_NUMINTRS_MSK (MSK(8) << GIC_SH_CONFIG_NUMINTRS_SHF)115 #define GIC_SH_CONFIG_PVPS_MSK (MSK(8) << GIC_SH_CONFIG_NUMVPS_SHF)118 #define GIC_SH_WEDGE_RW_MSK (MSK(1) << GIC_SH_WEDGE_RW_SHF)121 #define GIC_MAP_TO_PIN_MSK (MSK(1) << GIC_MAP_TO_PIN_SHF)123 #define GIC_MAP_TO_NMI_MSK (MSK(1) << GIC_MAP_TO_NMI_SHF)125 #define GIC_MAP_TO_YQ_MSK (MSK(1) << GIC_MAP_TO_YQ_SHF)127 #define GIC_MAP_MSK (MSK(6) << GIC_MAP_SHF)[all …]
27965 lt_setenv ("DUALCASE", "1"); /* for MSK sh */