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Searched refs:MPLL_FUNC_CNTL_1 (Results 1 – 9 of 9) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/pm/powerplay/smumgr/
H A Diceland_smumgr.c1077 MPLL_FUNC_CNTL_1, CLKF, mpll_param.mpll_fb_divider.cl_kf); in iceland_calculate_mclk_params()
1079 MPLL_FUNC_CNTL_1, CLKFRAC, mpll_param.mpll_fb_divider.clk_frac); in iceland_calculate_mclk_params()
1081 MPLL_FUNC_CNTL_1, VCO_MODE, mpll_param.vco_mode); in iceland_calculate_mclk_params()
H A Dci_smumgr.c1053 MPLL_FUNC_CNTL_1, CLKF, mpll_param.mpll_fb_divider.cl_kf); in ci_calculate_mclk_params()
1055 MPLL_FUNC_CNTL_1, CLKFRAC, mpll_param.mpll_fb_divider.clk_frac); in ci_calculate_mclk_params()
1057 MPLL_FUNC_CNTL_1, VCO_MODE, mpll_param.vco_mode); in ci_calculate_mclk_params()
H A Dtonga_smumgr.c823 MPLL_FUNC_CNTL_1, CLKF, in tonga_calculate_mclk_params()
826 MPLL_FUNC_CNTL_1, CLKFRAC, in tonga_calculate_mclk_params()
829 MPLL_FUNC_CNTL_1, VCO_MODE, in tonga_calculate_mclk_params()
/openbmc/linux/drivers/gpu/drm/radeon/
H A Dsid.h615 #define MPLL_FUNC_CNTL_1 0x2bb8 macro
H A Dcikd.h738 #define MPLL_FUNC_CNTL_1 0x2bb8 macro
H A Dci_dpm.c1854 pi->clock_registers.mpll_func_cntl_1 = RREG32(MPLL_FUNC_CNTL_1); in ci_read_clock_registers()
H A Dsi_dpm.c3563 si_pi->clock_registers.mpll_func_cntl_1 = RREG32(MPLL_FUNC_CNTL_1); in si_read_clock_registers()
/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Dsid.h616 #define MPLL_FUNC_CNTL_1 0xAEE macro
/openbmc/linux/drivers/gpu/drm/amd/pm/legacy-dpm/
H A Dsi_dpm.c4037 si_pi->clock_registers.mpll_func_cntl_1 = RREG32(MPLL_FUNC_CNTL_1); in si_read_clock_registers()