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Searched refs:MP1_Public (Results 1 – 12 of 12) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/pm/powerplay/smumgr/
H A Dsmu9_smumgr.c34 #define MP1_Public 0x03b00000 macro
44 mp1_fw_flags = RREG32_PCIE(MP1_Public | in smu9_is_smc_ram_running()
H A Dvega20_smumgr.c41 #define MP1_Public 0x03b00000 macro
54 mp1_fw_flags = RREG32_PCIE(MP1_Public | in vega20_is_smc_ram_running()
H A Dsmu10_smumgr.c43 #define MP1_Public 0x03b00000 macro
/openbmc/linux/drivers/gpu/drm/amd/pm/swsmu/inc/
H A Dsmu_v12_0.h31 #define MP1_Public 0x03b00000 macro
H A Dsmu_v13_0.h33 #define MP1_Public 0x03b00000 macro
H A Dsmu_v11_0.h43 #define MP1_Public 0x03b00000 macro
/openbmc/linux/drivers/gpu/drm/amd/pm/swsmu/smu13/
H A Dsmu_v13_0.c160 WREG32_PCIE(MP1_Public | (smnMP1_PUB_CTRL & 0xffffffff), in smu_v13_0_load_microcode()
162 WREG32_PCIE(MP1_Public | (smnMP1_PUB_CTRL & 0xffffffff), in smu_v13_0_load_microcode()
166 mp1_fw_flags = RREG32_PCIE(MP1_Public | in smu_v13_0_load_microcode()
240 mp1_fw_flags = RREG32_PCIE(MP1_Public | in smu_v13_0_check_fw_status()
244 mp1_fw_flags = RREG32_PCIE(MP1_Public | in smu_v13_0_check_fw_status()
H A Dsmu_v13_0_6_ppt.c51 #undef MP1_Public
55 #define MP1_Public 0x03b00000 macro
581 RREG32_PCIE(MP1_Public | (smnMP1_FIRMWARE_FLAGS & 0xffffffff)); in smu_v13_0_6_check_fw_status()
H A Dsmu_v13_0_7_ppt.c393 mp1_fw_flags = RREG32_PCIE(MP1_Public | in smu_v13_0_7_check_fw_status()
/openbmc/linux/drivers/gpu/drm/amd/pm/swsmu/smu12/
H A Dsmu_v12_0.c63 mp1_fw_flags = RREG32_PCIE(MP1_Public | in smu_v12_0_check_fw_status()
/openbmc/linux/drivers/gpu/drm/amd/pm/swsmu/smu11/
H A Dsmu_v11_0.c163 WREG32_PCIE(MP1_Public | (smnMP1_PUB_CTRL & 0xffffffff), in smu_v11_0_load_microcode()
165 WREG32_PCIE(MP1_Public | (smnMP1_PUB_CTRL & 0xffffffff), in smu_v11_0_load_microcode()
169 mp1_fw_flags = RREG32_PCIE(MP1_Public | in smu_v11_0_load_microcode()
188 mp1_fw_flags = RREG32_PCIE(MP1_Public | in smu_v11_0_check_fw_status()
H A Dsienna_cichlid_ppt.c4227 reg = RREG32_PCIE(MP1_Public | smnMP1_PMI_3_START); in sienna_cichlid_stb_init()
4237 reg = RREG32_PCIE(MP1_Public | smnMP1_PMI_3_FIFO); in sienna_cichlid_stb_init()
4314 *p++ = cpu_to_le32(RREG32_PCIE(MP1_Public | smnMP1_PMI_3)); in sienna_cichlid_stb_get_data_direct()