Home
last modified time | relevance | path

Searched refs:MMHUB_BASE (Results 1 – 25 of 28) sorted by relevance

12

/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Ddimgrey_cavefish_reg_init.c37 adev->reg_offset[MMHUB_HWIP][i] = (uint32_t *)(&(MMHUB_BASE.instance[i])); in dimgrey_cavefish_reg_base_init()
H A Daldebaran_reg_init.c36 adev->reg_offset[MMHUB_HWIP][i] = (uint32_t *)(&(MMHUB_BASE.instance[i])); in aldebaran_reg_base_init()
H A Darct_reg_init.c36 adev->reg_offset[MMHUB_HWIP][i] = (uint32_t *)(&(MMHUB_BASE.instance[i])); in arct_reg_base_init()
H A Dvega10_reg_init.c36 adev->reg_offset[MMHUB_HWIP][i] = (uint32_t *)(&(MMHUB_BASE.instance[i])); in vega10_reg_base_init()
H A Dvega20_reg_init.c36 adev->reg_offset[MMHUB_HWIP][i] = (uint32_t *)(&(MMHUB_BASE.instance[i])); in vega20_reg_base_init()
/openbmc/linux/drivers/gpu/drm/amd/include/
H A Dcyan_skillfish_ip_offset.h81 static const struct IP_BASE MMHUB_BASE ={ { { { 0x0001A000, 0, 0, 0, 0 } }, variable
H A Dnavi10_ip_offset.h79 static const struct IP_BASE MMHUB_BASE ={ { { { 0x0001A000, 0, 0, 0, 0, 0 } }, variable
H A Ddimgrey_cavefish_ip_offset.h102 static const struct IP_BASE MMHUB_BASE = { { { { 0x0001A000, 0x02408800, 0, 0, 0, 0 } }, variable
H A Dnavi12_ip_offset.h109 static const struct IP_BASE MMHUB_BASE ={ { { { 0x0001A000, 0x02408800, 0, 0, 0 } }, variable
H A Dnavi14_ip_offset.h109 static const struct IP_BASE MMHUB_BASE ={ { { { 0x0001A000, 0x02408800, 0, 0, 0 } }, variable
H A Dvega20_ip_offset.h81 static const struct IP_BASE MMHUB_BASE ={ { { { 0x0001A000, 0, 0, 0, 0, 0 } }, variable
H A Dsienna_cichlid_ip_offset.h109 static const struct IP_BASE MMHUB_BASE = { { { { 0x0001A000, 0x02408800, 0, 0, 0 } }, variable
H A Dbeige_goby_ip_offset.h117 static const struct IP_BASE MMHUB_BASE = { { { { 0x0001A000, 0x02408800, 0, 0, 0, 0 } }, variable
H A Drenoir_ip_offset.h144 static const struct IP_BASE MMHUB_BASE ={ { { { 0x0001A000, 0x02408800, 0, 0, 0 } }, variable
H A Dvega10_ip_offset.h148 static const struct IP_BASE __maybe_unused MMHUB_BASE = { { { { 0x0001A000, 0, 0, 0, 0 } }, variable
H A Dvangogh_ip_offset.h130 static const struct IP_BASE MMHUB_BASE = { { { { 0x00013200, 0x0001A000, 0x02408800, 0, 0, 0 } }, variable
H A Dyellow_carp_offset.h103 static const struct IP_BASE MMHUB_BASE = { { { { 0x00013200, 0x0001A000, 0x02408800, 0, 0, 0 } }, variable
H A Darct_ip_offset.h87 static const struct IP_BASE MMHUB_BASE ={ { { { 0x00012440, 0x0001A000, 0x00408800, 0, 0… variable
H A Daldebaran_ip_offset.h126 static const struct IP_BASE MMHUB_BASE = { { { { 0x0001A000, 0x02408800, 0, 0, 0, 0 } }, variable
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dce120/
H A Ddce120_resource.c148 #define MMHUB_BASE(seg) \ macro
152 .reg_name = MMHUB_BASE(mm ## reg_name ## _BASE_IDX) + \
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn201/
H A Ddcn201_resource.c293 #define MMHUB_BASE(seg) \ macro
297 .reg_name = MMHUB_BASE(mmMM ## reg_name ## _BASE_IDX) + \
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn10/
H A Ddcn10_resource.c144 #define MMHUB_BASE(seg) \ macro
148 .reg_name = MMHUB_BASE(mm ## reg_name ## _BASE_IDX) + \
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn301/
H A Ddcn301_resource.c173 #define MMHUB_BASE(seg) \ macro
177 .reg_name = MMHUB_BASE(regMM ## reg_name ## _BASE_IDX) + \
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn21/
H A Ddcn21_resource.c140 #define MMHUB_BASE(seg) \ macro
144 .reg_name = MMHUB_BASE(mmMM ## reg_name ## _BASE_IDX) + \
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn314/
H A Ddcn314_resource.c197 #define MMHUB_BASE(seg) \ macro
201 .reg_name = MMHUB_BASE(reg ## reg_name ## _BASE_IDX) + \

12