Home
last modified time | relevance | path

Searched refs:MISO (Results 1 – 25 of 30) sorted by relevance

12

/openbmc/u-boot/board/renesas/stout/
H A Dcpld.c18 #define MISO (92 + 27) macro
48 data |= gpio_get_value(MISO); /* MSB first */ in cpld_read()
96 gpio_request(MISO, "MISO"); in cpld_init()
101 gpio_direction_input(MISO); in cpld_init()
/openbmc/linux/Documentation/spi/
H A Dbutterfly.rst38 MISO J403.PB3/MISO pin 11/S7,nBUSY
69 MISO J403.PE6/DO pin 12/S5,nPAPEROUT
H A Dspi-summary.rst16 Slave Out" (MISO) signals. (Other names are also used.) There are four
57 Some chips eliminate a signal line by combining MOSI and MISO, and
184 MOSI, and MISO.
511 SPI bus (shared SCK, MOSI, MISO). Valid bus numbers start at zero. On
/openbmc/linux/Documentation/driver-api/
H A Dspi.rst8 line, and a "Master In, Slave Out" (MISO) data line. SPI is a full
10 another is shifted in on the MISO line. Those bits are assembled into
/openbmc/u-boot/doc/device-tree-bindings/spi/
H A Dsoft-spi.txt15 gpio-miso: GPIO to use for SPI MISO line (input)
H A Dspi-bus.txt61 used for MISO. Defaults to 1 if not present.
/openbmc/u-boot/arch/arm/dts/
H A Darmada-8040-clearfog-gt-8k.dts213 * [9.11]CP1 SPI0 MOSI/MISO/CLK
214 * [13] CP1 SPI1 MISO (TDM and SPI ROM shared)
H A Darmada-8040-mcbin.dts226 * [13] SPI1 MISO (TDM and SPI ROM shared)
H A Dsun7i-a20-bananapi.dts251 "SPI-MISO", "SPI-CE1", "",
H A Darmada-385-turris-omnia.dts377 /* MISO, MOSI, SCLK and CS1 are routed to pin header CN11 */
/openbmc/linux/Documentation/devicetree/bindings/leds/
H A Dleds-spi-byte.txt7 - no return value is necessary (no MISO signal)
/openbmc/linux/arch/arm64/boot/dts/renesas/
H A Drzg2ul-smarc-pinfunction.dtsi111 <RZG2L_PORT_PINMUX(4, 2, 2)>, /* MISO */
H A Drzg2lc-smarc-pinfunction.dtsi121 <RZG2L_PORT_PINMUX(44, 2, 1)>, /* MISO */
H A Drzg2l-smarc-pinfunction.dtsi135 <RZG2L_PORT_PINMUX(44, 2, 1)>, /* MISO */
/openbmc/linux/Documentation/hwmon/
H A Dlm70.rst46 comprise the MOSI/MISO loop. At the end of the transfer, the 11-bit 2's
/openbmc/linux/arch/arm/boot/dts/microchip/
H A Dlan966x-kontron-kswitch-d10-mmt.dtsi56 /* SCK, MISO, MOSI */
/openbmc/linux/arch/arm64/boot/dts/marvell/
H A Darmada-8040-clearfog-gt-8k.dts432 * [9.11]CP1 SPI0 MOSI/MISO/CLK
433 * [13] CP1 SPI1 MISO (TDM and SPI ROM shared)
/openbmc/linux/arch/arm64/boot/dts/qcom/
H A Dsm8550.dtsi3431 /* MISO, MOSI, CLK */
3446 /* MISO, MOSI, CLK */
3461 /* MISO, MOSI, CLK */
3476 /* MISO, MOSI, CLK */
3491 /* MISO, MOSI, CLK */
3506 /* MISO, MOSI, CLK */
3521 /* MISO, MOSI, CLK */
3536 /* MISO, MOSI, CLK */
3551 /* MISO, MOSI, CLK */
3566 /* MISO, MOSI, CLK */
[all …]
/openbmc/linux/arch/arm64/boot/dts/amlogic/
H A Dmeson-gxl-s805x-libretech-ac.dts248 "SPI NOR MOSI", "SPI NOR MISO", "SPI NOR Clk",
/openbmc/linux/arch/arm/boot/dts/allwinner/
H A Dsun7i-a20-bananapi.dts247 "SPI-MISO", "SPI-CE1", "",
/openbmc/linux/arch/arm/boot/dts/intel/pxa/
H A Dpxa300-raumfeld-common.dtsi333 MFP_PIN_PXA300(98) MFP_AF0 /* MISO */
/openbmc/linux/arch/arm/boot/dts/st/
H A Dste-ux500-samsung-janice.dts278 /* MISO/MOSI on GPIO224 (no separate MISO pin) */
H A Dste-ux500-samsung-codina-tmo.dts256 /* MISO on GPIO225, pin SDO "slave data out" */
/openbmc/linux/arch/arm/boot/dts/marvell/
H A Darmada-385-turris-omnia.dts556 /* MISO, MOSI, SCLK and CS2 are routed to pin header CN11 */
/openbmc/linux/Documentation/driver-api/gpio/
H A Ddrivers-on-gpio.rst54 of wires, at least SCK and optionally MISO, MOSI and chip select lines) using

12