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Searched refs:MISC_CLK_CTRL__DFT_SMS_PG_CLK_SEL_MASK (Results 1 – 8 of 8) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dci_baco.c113 …{ CMD_READMODIFYWRITE, mmGCK_SMC_IND_DATA, MISC_CLK_CTRL__DFT_SMS_PG_CLK_SEL_MASK, MISC_CLK_CTRL__…
/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Dvi.c1197 MISC_CLK_CTRL__ZCLK_SEL_MASK | MISC_CLK_CTRL__DFT_SMS_PG_CLK_SEL_MASK); in vi_program_aspm()
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/smu/
H A Dsmu_7_0_0_sh_mask.h273 #define MISC_CLK_CTRL__DFT_SMS_PG_CLK_SEL_MASK 0xff0000 macro
H A Dsmu_7_1_1_sh_mask.h271 #define MISC_CLK_CTRL__DFT_SMS_PG_CLK_SEL_MASK 0xff0000 macro
H A Dsmu_7_0_1_sh_mask.h271 #define MISC_CLK_CTRL__DFT_SMS_PG_CLK_SEL_MASK 0xff0000 macro
H A Dsmu_7_1_0_sh_mask.h269 #define MISC_CLK_CTRL__DFT_SMS_PG_CLK_SEL_MASK 0xff0000 macro
H A Dsmu_7_1_3_sh_mask.h299 #define MISC_CLK_CTRL__DFT_SMS_PG_CLK_SEL_MASK 0xff0000 macro
H A Dsmu_7_1_2_sh_mask.h271 #define MISC_CLK_CTRL__DFT_SMS_PG_CLK_SEL_MASK 0xff0000 macro