Searched refs:MIPI_CSIS_DBG_INTR_SRC_CAM_VSYNC_RISE (Results 1 – 1 of 1) sorted by relevance
220 #define MIPI_CSIS_DBG_INTR_SRC_CAM_VSYNC_RISE BIT(0) macro282 { true, MIPI_CSIS_DBG_INTR_SRC_CAM_VSYNC_RISE, "VSYNC Rising Edge" },