Home
last modified time | relevance | path

Searched refs:MCFSIM_SWDICR (Results 1 – 7 of 7) sorted by relevance

/openbmc/u-boot/arch/m68k/include/asm/
H A Dm5249.h113 #define MCFSIM_SWDICR MCFSIM_ICR0 /* Watchdog timer ICR */ macro
/openbmc/linux/arch/m68k/include/asm/
H A Dm5407sim.h113 #define MCFSIM_SWDICR MCFSIM_ICR0 /* Watchdog timer ICR */ macro
H A Dm5206sim.h140 #define MCFSIM_SWDICR MCFSIM_ICR8 /* Watchdog timer ICR */ macro
H A Dm5307sim.h149 #define MCFSIM_SWDICR MCFSIM_ICR0 /* Watchdog timer ICR */ macro
H A Dm525xsim.h144 #define MCFSIM_SWDICR MCFSIM_ICR0 /* Watchdog timer ICR */ macro
H A Dm53xxsim.h67 #define MCFSIM_SWDICR MCFSIM_ICR0 /* Watchdog timer ICR */ macro
/openbmc/u-boot/arch/m68k/cpu/mcf52x2/
H A Dcpu_init.c193 mbar_writeByte(MCFSIM_SWDICR, 0x00); in cpu_init_f()
695 mbar_writeByte(MCFSIM_SWDICR, 0x00); in cpu_init_f()