Searched refs:MCFSIM_PLLCR (Results 1 – 4 of 4) sorted by relevance
28 volatile unsigned long cpll = mbar2_readLong(MCFSIM_PLLCR); in get_clocks()47 mbar2_writeLong(MCFSIM_PLLCR, cpll); /* Set the PLL to bypass mode (PSTCLK = crystal) */ in get_clocks()48 mbar2_writeLong(MCFSIM_PLLCR, pllcr); /* set the clock speed */ in get_clocks()50 mbar2_writeLong(MCFSIM_PLLCR, pllcr); /* Start locking (pll bypass = 1) */ in get_clocks()
108 #define MCFSIM_PLLCR 0x180 /* PLL Control register */ macro
33 #define MCFSIM_PLLCR (MCF_MBAR + 0x08) /* PLL Ctrl */ macro
33 #define MCFSIM_PLLCR (MCF_MBAR + 0x08) /* PLL Ctrl Reg */ macro