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Searched refs:MASK_SPECIAL3 (Results 1 – 1 of 1) sorted by relevance

/openbmc/qemu/target/mips/tcg/
H A Dtranslate.c340 #define MASK_SPECIAL3(op) (MASK_OP_MAJOR(op) | (op & 0x3F)) macro
455 #define MASK_BSHFL(op) (MASK_SPECIAL3(op) | (op & (0x1F << 6)))
469 #define MASK_DBSHFL(op) (MASK_SPECIAL3(op) | (op & (0x1F << 6)))
491 #define MASK_LX(op) (MASK_SPECIAL3(op) | (op & (0x1F << 6)))
500 #define MASK_ADDU_QB(op) (MASK_SPECIAL3(op) | (op & (0x1F << 6)))
530 #define MASK_ADDUH_QB(op) (MASK_SPECIAL3(op) | (op & (0x1F << 6)))
552 #define MASK_ABSQ_S_PH(op) (MASK_SPECIAL3(op) | (op & (0x1F << 6)))
576 #define MASK_CMPU_EQ_QB(op) (MASK_SPECIAL3(op) | (op & (0x1F << 6)))
604 #define MASK_SHLL_QB(op) (MASK_SPECIAL3(op) | (op & (0x1F << 6)))
631 #define MASK_DPA_W_PH(op) (MASK_SPECIAL3(op) | (op & (0x1F << 6)))
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