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Searched refs:LHCR0 (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/arch/arm/mach-aspeed/ast2400/
H A Dplatform.S257 ldr r0, =0x1e7890a0 @ check LHCR0[27:24]=0x6
310 ldr r0, =0x1e7890a0 @ set LHCR0[31:0]=0xFFFFFF01
325 ldr r0, =0x1e7890a0 @ set LHCR0[31:0]=0xFFFFFF00
/openbmc/linux/drivers/pinctrl/aspeed/
H A Dpinctrl-aspeed-g5.c63 #define LHCR0 0xa0 macro
359 #define LPCHC_DESC SIG_DESC_IP_SET(ASPEED_IP_LPC, LHCR0, 0)