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Searched refs:LDR (Results 1 – 18 of 18) sorted by relevance

/openbmc/qemu/target/mips/tcg/
H A Drel6.decode29 REMOVED 011011 ----- ----- ---------------- # LDR
H A Dmicromips_translate.c.inc350 LDR = 0x5,
2541 case LDR:
/openbmc/linux/Documentation/trace/coresight/
H A Dcoresight.rst405 Instruction 0 0x8026B54C E59D3004 false LDR r3,[sp,#4]
411 Instruction 319 0x8026B54C E59D3004 false LDR r3,[sp,#4]
416 Instruction 9 0x8026B54C E59D3004 false LDR r3,[sp,#4]
421 Instruction 7 0x8026B54C E59D3004 false LDR r3,[sp,#4]
426 Instruction 7 0x8026B54C E59D3004 false LDR r3,[sp,#4]
431 Instruction 10 0x8026B54C E59D3004 false LDR r3,[sp,#4]
440 Instruction 0 0x8026B570 E59D1004 false LDR r1,[sp,#4]
441 …Instruction 0 0x8026B574 E59F0010 false LDR r0,[pc,#16] ; [0x8026B58C…
442 Instruction 0 0x8026B578 E592200C false LDR r2,[r2,#0xc]
443 Instruction 0 0x8026B57C E59221D0 false LDR r2,[r2,#0x1d0]
/openbmc/qemu/target/arm/tcg/
H A Da64.decode488 LDR 00 111 0 00 01 1 ..... ... . 10 ..... ..... @ldst sign=0 ext=1 sz=0
489 LDR 01 111 0 00 01 1 ..... ... . 10 ..... ..... @ldst sign=0 ext=1 sz=1
490 LDR 10 111 0 00 01 1 ..... ... . 10 ..... ..... @ldst sign=0 ext=1 sz=2
491 LDR 11 111 0 00 01 1 ..... ... . 10 ..... ..... @ldst sign=0 ext=0 sz=3
492 LDR 00 111 0 00 10 1 ..... ... . 10 ..... ..... @ldst sign=1 ext=0 sz=0
493 LDR 01 111 0 00 10 1 ..... ... . 10 ..... ..... @ldst sign=1 ext=0 sz=1
494 LDR 10 111 0 00 10 1 ..... ... . 10 ..... ..... @ldst sign=1 ext=0 sz=2
495 LDR 00 111 0 00 11 1 ..... ... . 10 ..... ..... @ldst sign=1 ext=1 sz=0
496 LDR 01 111 0 00 11 1 ..... ... . 10 ..... ..... @ldst sign=1 ext=1 sz=1
H A Dsme.decode54 LDR 1110000 100 0 000000 .. 000 ..... 0 .... @ldstr
H A Dtranslate-sme.c265 TRANS_FEAT(LDR, aa64_sme, do_ldst_r, a, gen_sve_ldr) in TRANS_FEAT() argument
H A Dtranslate.c5246 DO_LDST(LDR, load, MO_UL) in DO_LDST() argument
/openbmc/linux/Documentation/staging/
H A Dspeculation.rst39 LDR <returnval>, [<array>, <index>]
/openbmc/linux/arch/arm/nwfpe/
H A Dentry.S105 @ plain LDR instruction. Weird, but it seems harmless.
/openbmc/linux/Documentation/arch/arm/
H A Dvlocks.rst133 LDR Rt, [Rn]
/openbmc/u-boot/
H A DMakefile360 LDR = $(CROSS_COMPILE)ldr macro
396 export CPP AR NM LDR STRIP OBJCOPY OBJDUMP
/openbmc/linux/Documentation/livepatch/
H A Dreliable-stacktrace.rst284 function's LDR and the frame pointer pointing to this function's stackframe.
/openbmc/linux/arch/x86/kvm/
H A Dtrace.h250 AREG(EOI), AREG(RRR), AREG(LDR), AREG(DFR), AREG(SPIV), AREG(ISR), \
/openbmc/qemu/tcg/arm/
H A Dtcg-target.c.inc604 /* Note that this routine is used for both LDR and LDRH formats, so we do
1142 /* LDR is interworking from v5t. */
/openbmc/linux/arch/arm/mm/
H A DKconfig949 DMA cache maintenance functions is performed. These LDR/STR
/openbmc/linux/arch/mips/
H A DKconfig2396 LDL, LDR, SDL, SDR (Load/store doubleword left/right, for 64bit
/openbmc/qemu/tcg/aarch64/
H A Dtcg-target.c.inc1170 tcg_out_insn(s, 3305, LDR, 0, rd);
/openbmc/qemu/target/s390x/tcg/
H A Dinsn-data.h.inc424 F(0x2800, LDR, RR_a, Z, 0, f2, 0, f1, mov2, 0, IF_AFP1 | IF_AFP2)