| /openbmc/linux/arch/x86/boot/ |
| H A D | early_serial_console.c | 17 #define LCR 3 /* Line control */ macro
31 outb(0x3, port + LCR); /* 8n1 */ in early_serial_init()
37 c = inb(port + LCR); in early_serial_init()
38 outb(c | DLAB, port + LCR); in early_serial_init()
41 outb(c & ~DLAB, port + LCR); in early_serial_init()
107 lcr = inb(port + LCR); in probe_baud()
108 outb(lcr | DLAB, port + LCR); in probe_baud()
111 outb(lcr, port + LCR); in probe_baud()
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| /openbmc/linux/arch/x86/kernel/ |
| H A D | early_printk.c | 90 #define LCR 3 /* Line control */ macro
134 serial_out(early_serial_base, LCR, 0x3); /* 8n1 */ in early_serial_hw_init()
139 c = serial_in(early_serial_base, LCR); in early_serial_hw_init()
140 serial_out(early_serial_base, LCR, c | DLAB); in early_serial_hw_init()
143 serial_out(early_serial_base, LCR, c & ~DLAB); in early_serial_hw_init()
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| /openbmc/linux/arch/arm/mach-orion5x/ |
| H A D | tsx09-common.c | 32 writel(0x83, UART1_REG(LCR)); in qnap_tsx09_power_off()
35 writel(0x03, UART1_REG(LCR)); in qnap_tsx09_power_off()
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| H A D | terastation_pro2-setup.c | 275 writel(0x83, UART1_REG(LCR)); in tsp2_power_off()
278 writel(0x1b, UART1_REG(LCR)); in tsp2_power_off()
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| H A D | kurobox_pro-setup.c | 297 writel(0x83, UART1_REG(LCR)); in kurobox_pro_power_off()
300 writel(0x1b, UART1_REG(LCR)); in kurobox_pro_power_off()
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| /openbmc/linux/drivers/power/reset/ |
| H A D | qnap-poweroff.c | 60 writel(0x83, UART1_REG(LCR)); in qnap_power_off()
63 writel(0x03, UART1_REG(LCR)); in qnap_power_off()
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| /openbmc/linux/drivers/usb/serial/ |
| H A D | io_16654.h | 35 #define LCR 3 // Line Control Register macro
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| H A D | io_edgeport.c | 2217 MAKE_CMD_WRITE_REG(&currCmd, &cmdLen, number, LCR, LCR_DL_ENABLE); in send_cmd_write_baud_rate()
2224 MAKE_CMD_WRITE_REG(&currCmd, &cmdLen, number, LCR, in send_cmd_write_baud_rate()
2298 regNum == LCR) { in send_cmd_write_uart_register()
2461 status = send_cmd_write_uart_register(edge_port, LCR, in change_port_settings()
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| /openbmc/linux/drivers/net/hamradio/ |
| H A D | baycom_ser_fdx.c | 97 #define LCR(iobase) (iobase+3) macro
173 outb(0x81, LCR(dev->base_addr)); /* DLAB = 1 */ in ser12_set_divisor()
176 outb(0x01, LCR(dev->base_addr)); /* word length = 6 */ in ser12_set_divisor()
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| H A D | yam.c | 154 #define LCR(iobase) (iobase+3) macro
294 outb(LCR_DLAB | LCR_BIT5, LCR(iobase)); in fpga_reset()
298 outb(LCR_BIT5, LCR(iobase)); in fpga_reset()
466 outb(LCR_DLAB | LCR_BIT8, LCR(dev->base_addr)); in yam_set_uart()
469 outb(LCR_BIT8, LCR(dev->base_addr)); in yam_set_uart()
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| H A D | baycom_ser_hdx.c | 83 #define LCR(iobase) (iobase+3) macro
158 outb(0x81, LCR(dev->base_addr)); /* DLAB = 1 */ in ser12_set_divisor()
161 outb(0x01, LCR(dev->base_addr)); /* word length = 6 */ in ser12_set_divisor()
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| /openbmc/linux/drivers/tty/serial/8250/ |
| H A D | 8250_pci.c | 1279 u8 LCR, val; in pci_quatech_rqopr() local
1281 LCR = inb(base + UART_LCR); in pci_quatech_rqopr()
1284 outb(LCR, base + UART_LCR); in pci_quatech_rqopr()
1291 u8 LCR; in pci_quatech_wqopr() local
1293 LCR = inb(base + UART_LCR); in pci_quatech_wqopr()
1297 outb(LCR, base + UART_LCR); in pci_quatech_wqopr()
1303 u8 LCR, val, qmcr; in pci_quatech_rqmcr() local
1305 LCR = inb(base + UART_LCR); in pci_quatech_rqmcr()
1311 outb(LCR, base + UART_LCR); in pci_quatech_rqmcr()
1319 u8 LCR, val; in pci_quatech_wqmcr() local
[all …]
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| /openbmc/linux/drivers/tty/serial/ |
| H A D | men_z135_uart.c | 96 #define LCR(x) (((x) >> MEN_Z135_LCR_SHIFT) & 0xff) macro
657 lcr = LCR(conf_reg); in men_z135_set_termios()
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| /openbmc/qemu/hw/char/ |
| H A D | trace-events | 60 pl011_can_receive(uint32_t lcr, int read_count, int r) "LCR 0x%08x read_count %d returning %d"
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| /openbmc/qemu/tcg/s390x/ |
| H A D | tcg-target.c.inc | 1420 tcg_out_insn(s, RR, LCR, dest, dest);
2266 tcg_out_insn(s, RR, LCR, args[0], args[1]);
2345 tcg_out_insn(s, RR, LCR, TCG_TMP0, args[2]);
2655 tcg_out_insn(s, RR, LCR, TCG_TMP0, args[2]);
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| /openbmc/qemu/target/s390x/tcg/ |
| H A D | insn-data.h.inc | 486 C(0x1300, LCR, RR_a, Z, 0, r2, new, r1_32, neg, neg32)
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