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Searched refs:LANE_COUNT_ONE (Results 1 – 7 of 7) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/display/dc/link/protocols/
H A Dlink_dp_capability.c83 {LANE_COUNT_ONE, LINK_RATE_UHBR20},
86 {LANE_COUNT_ONE, LINK_RATE_UHBR13_5},
88 {LANE_COUNT_ONE, LINK_RATE_UHBR10},
91 {LANE_COUNT_ONE, LINK_RATE_HIGH3},
93 {LANE_COUNT_ONE, LINK_RATE_HIGH2},
96 {LANE_COUNT_ONE, LINK_RATE_HIGH},
97 {LANE_COUNT_ONE, LINK_RATE_LOW},
101 .lane_count = LANE_COUNT_ONE,
427 return lane_count <= LANE_COUNT_ONE; in reached_minimum_lane_count()
441 return LANE_COUNT_ONE; in reduce_lane_count()
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H A Dlink_dp_training.c442 if (ln_count >= LANE_COUNT_ONE && !dpcd_lane_status[0].bits.CR_DONE_0) in dp_get_cr_failure()
1560 (cur_link_settings.lane_count <= LANE_COUNT_ONE); in perform_link_training_with_retries()
1700 (cur_link_settings.lane_count <= LANE_COUNT_ONE); in perform_link_training_with_retries()
1722 (cur_link_settings.lane_count <= LANE_COUNT_ONE)); in perform_link_training_with_retries()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dce/
H A Ddce_link_encoder.c604 DP_UDI_LANES, link_settings->lane_count - LANE_COUNT_ONE); in configure_encoder()
618 DP_UDI_LANES, link_settings->lane_count - LANE_COUNT_ONE); in dce60_configure_encoder()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn31/
H A Ddcn31_hpo_dp_link_encoder.c73 NUM_LANES, num_lanes == LANE_COUNT_ONE ? 0 : num_lanes == LANE_COUNT_TWO ? 1 : 3); in dcn31_hpo_dp_link_enc_enable()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/
H A Ddc_dp_types.h34 LANE_COUNT_ONE = 1, enumerator
/openbmc/linux/drivers/gpu/drm/amd/display/amdgpu_dm/
H A Damdgpu_dm_debugfs.c290 case LANE_COUNT_ONE: in dp_link_settings_write()
424 case LANE_COUNT_ONE: in dp_mst_link_setting()
3101 case LANE_COUNT_ONE: in edp_ilr_write()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn10/
H A Ddcn10_link_encoder.c492 DP_UDI_LANES, link_settings->lane_count - LANE_COUNT_ONE); in enc1_configure_encoder()