Searched refs:JZ4740_CLK_PLL (Results 1 – 2 of 2) sorted by relevance
/openbmc/linux/drivers/clk/ingenic/ |
H A D | jz4740-cgu.c | 69 [JZ4740_CLK_PLL] = { 96 .parents = { JZ4740_CLK_PLL, -1, -1, -1 }, 110 .parents = { JZ4740_CLK_PLL, -1, -1, -1 }, 119 .parents = { JZ4740_CLK_PLL, -1, -1, -1 }, 128 .parents = { JZ4740_CLK_PLL, -1, -1, -1 }, 142 .parents = { JZ4740_CLK_PLL, -1, -1, -1 }, 175 .parents = { JZ4740_CLK_EXT, JZ4740_CLK_PLL, -1, -1 },
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/openbmc/linux/include/dt-bindings/clock/ |
H A D | ingenic,jz4740-cgu.h | 17 #define JZ4740_CLK_PLL 2 macro
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