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Searched refs:INT_DSR (Results 1 – 2 of 2) sorted by relevance

/openbmc/qemu/rust/hw/char/pl011/src/
H A Dlib.rs560 pub const INT_DSR: u32 = 1 << 3; constant
565 pub const INT_MS: u32 = INT_RI | INT_DSR | INT_DCD | INT_CTS;
584 pub const MS: u32 = INT_RI | INT_DSR | INT_DCD | INT_CTS;
/openbmc/qemu/hw/char/
H A Dpl011.c72 #define INT_DSR (1 << 3) macro
77 #define INT_MS (INT_RI | INT_DSR | INT_DCD | INT_CTS)
393 il = s->int_level & ~(INT_DSR | INT_DCD | INT_CTS | INT_RI); in pl011_loopback_mdmctrl()
394 il |= (fr & PL011_FLAG_DSR) ? INT_DSR : 0; in pl011_loopback_mdmctrl()