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Searched refs:INSTPM (Results 1 – 10 of 10) sorted by relevance

/openbmc/linux/drivers/video/fbdev/i810/
H A Di810_regs.h51 #define INSTPM 0x020C0 macro
/openbmc/linux/drivers/gpu/drm/i915/gvt/
H A Dmmio_context.c53 {RCS0, INSTPM, 0xffff, true}, /* 0x20c0 */
85 {RCS0, INSTPM, 0xffff, true}, /* 0x20c0 */
H A Dcmd_parser.c926 offset == i915_mmio_reg_offset(INSTPM))) in cmd_reg_handler()
/openbmc/linux/drivers/video/fbdev/intelfb/
H A Dintelfbhw.h104 #define INSTPM 0x20c0 macro
H A Dintelfbhw.c643 hw->instpm = INREG(INSTPM); in intelfbhw_read_hw_state()
/openbmc/linux/drivers/gpu/drm/i915/gt/
H A Dintel_workarounds.c343 wa_masked_en(wal, INSTPM, INSTPM_FORCE_ORDERING); in gen6_ctx_workarounds_init()
349 wa_masked_en(wal, INSTPM, INSTPM_FORCE_ORDERING); in gen7_ctx_workarounds_init()
355 wa_masked_en(wal, INSTPM, INSTPM_FORCE_ORDERING); in gen8_ctx_workarounds_init()
/openbmc/linux/drivers/gpu/drm/i915/
H A Dintel_clock_gating.c745 intel_uncore_write(&i915->uncore, INSTPM, _MASKED_BIT_ENABLE(INSTPM_AGPBUSY_INT_EN)); in gen3_init_clock_gating()
H A Di915_reg.h1054 #define INSTPM _MMIO(0x20c0) macro
/openbmc/linux/drivers/gpu/drm/i915/display/
H A Di9xx_wm.c173 was_enabled = intel_uncore_read(&dev_priv->uncore, INSTPM) & INSTPM_SELF_EN; in _intel_set_memory_cxsr()
176 intel_uncore_write(&dev_priv->uncore, INSTPM, val); in _intel_set_memory_cxsr()
177 intel_uncore_posting_read(&dev_priv->uncore, INSTPM); in _intel_set_memory_cxsr()
H A Dintel_display_debugfs.c71 sr_enabled = intel_de_read(dev_priv, INSTPM) & INSTPM_SELF_EN; in i915_sr_status()