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/openbmc/linux/Documentation/translations/zh_CN/core-api/
H A Didr.rst27 符、进程ID、网络协议中的数据包标识符、SCSI标记和设备实例编号。IDR和IDA为这个问题
28 提供了一个合理的解决方案，以避免每个人都自创。IDR提供将ID映射到指针的能力，而IDA
31 IDR接口已经被废弃，请使用 ``XArray`` 。
33 IDR的用法
36 首先初始化一个IDR，对于静态分配的IDR使用DEFINE_IDR()，或者对于动态分配的IDR使用
44 象插入IDR。
50 如果需要按顺序分配ID，可以使用idr_alloc_cyclic()。处理较大数量的ID时，IDR的效率会
53 要对IDR使用的所有指针进行操作，您可以使用基于回调的idr_for_each()或迭代器样式的
57 当使用完IDR后，您可以调用idr_destroy()来释放IDR占用的内存。这并不会释放IDR指向的
62 如果在从IDR分配一个新ID时需要带锁，您可能需要传递一组限制性的GFP标志，但这可能导
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/openbmc/qemu/tests/qtest/
H A Dstm32l4x5_gpio-test.c32 #define IDR 0x10 macro
166 case IDR: in reset()
223 uint32_t idr = gpio_readl(GPIO_A, IDR); in test_idr_reset_value()
232 g_assert_cmphex(idr, ==, reset(GPIO_A, IDR)); in test_idr_reset_value()
238 idr = gpio_readl(GPIO_B, IDR); in test_idr_reset_value()
247 g_assert_cmphex(idr, ==, reset(GPIO_B, IDR)); in test_idr_reset_value()
253 idr = gpio_readl(GPIO_C, IDR); in test_idr_reset_value()
261 g_assert_cmphex(idr, ==, reset(GPIO_C, IDR)); in test_idr_reset_value()
267 idr = gpio_readl(GPIO_H, IDR); in test_idr_reset_value()
275 g_assert_cmphex(idr, ==, reset(GPIO_H, IDR)); in test_idr_reset_value()
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/openbmc/linux/Documentation/core-api/
H A Didr.rst15 and device instance numbers. The IDR and the IDA provide a reasonable
16 solution to the problem to avoid everybody inventing their own. The IDR
20 The IDR interface is deprecated; please use the :doc:`XArray <xarray>`
23 IDR usage
26 Start by initialising an IDR, either with DEFINE_IDR()
38 into the IDR.
46 idr_alloc_cyclic(). The IDR becomes less efficient when dealing
49 To perform an action on all pointers used by the IDR, you can
55 When you have finished using an IDR, you can call idr_destroy()
56 to release the memory used by the IDR. This will not free the objects
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/openbmc/linux/drivers/scsi/aacraid/
H A Dsrc.c130 src_writel(dev, MUnit.IDR, 1 << 23); in aac_src_intr_message()
251 src_writel(dev, MUnit.IDR, INBOUNDDOORBELL_0 << SRC_IDR_SHIFT); in src_sync_cmd()
773 src_writel(dev, MUnit.IDR, IOP_SRC_RESET_MASK); in aac_send_iop_reset()
1358 val = src_readl(dev, MUnit.IDR); in aac_src_access_devreg()
1360 src_writel(dev, MUnit.IDR, val); in aac_src_access_devreg()
1361 src_readl(dev, MUnit.IDR); in aac_src_access_devreg()
1373 val = src_readl(dev, MUnit.IDR); in aac_src_access_devreg()
1375 src_writel(dev, MUnit.IDR, val); in aac_src_access_devreg()
1376 src_readl(dev, MUnit.IDR); in aac_src_access_devreg()
1381 val = src_readl(dev, MUnit.IDR); in aac_src_access_devreg()
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H A Drx.c280 rx_writel(dev, MUnit.IDR,INBOUNDDOORBELL_1); in aac_rx_notify_adapter()
283 rx_writel(dev, MUnit.IDR,INBOUNDDOORBELL_4); in aac_rx_notify_adapter()
286 rx_writel(dev, MUnit.IDR,INBOUNDDOORBELL_2); in aac_rx_notify_adapter()
289 rx_writel(dev, MUnit.IDR,INBOUNDDOORBELL_3); in aac_rx_notify_adapter()
294 rx_writel(dev, MUnit.IDR,INBOUNDDOORBELL_6); in aac_rx_notify_adapter()
297 rx_writel(dev, MUnit.IDR,INBOUNDDOORBELL_5); in aac_rx_notify_adapter()
H A Daacraid.h1100 __le32 IDR; /* 1320h | 20h | Inbound Doorbell Register */ member
1136 #define InboundDoorbellReg MUnit.IDR
1178 __le32 IDR; /* 20h | Inbound Doorbell Register */ member
H A Dcommsup.c1995 events = src_readl(dev, MUnit.IDR); in aac_handle_sa_aif()
/openbmc/linux/drivers/clocksource/
H A Dtimer-atmel-tcb.c99 writel(0xff, tcaddr + ATMEL_TC_REG(i, IDR)); in tc_clksrc_resume()
165 writel(0xff, regs + ATMEL_TC_REG(2, IDR)); in tc_shutdown()
324 writel(0xff, tcaddr + ATMEL_TC_REG(0, IDR)); /* no irqs */ in tcb_setup_dual_chan()
332 writel(0xff, tcaddr + ATMEL_TC_REG(1, IDR)); /* no irqs */ in tcb_setup_dual_chan()
348 writel(0xff, tcaddr + ATMEL_TC_REG(0, IDR)); /* no irqs */ in tcb_setup_single_chan()
426 writel(ATMEL_TC_ALL_IRQ, tc.regs + ATMEL_TC_REG(i, IDR)); in tcb_clksrc_init()
/openbmc/libmctp/docs/bindings/
H A Dvendor-ibm-astlpc.md35 Input Data Register (IDR).
37 ### IDR: Input Data Register
39 One of the three register interfaces exposed by a KCS device. The IDR is a one
85 indication of IBF and OBF events on the input (IDR) and output (ODR) buffers.
135 (ODR) and the Input Data Register (IDR). The ODR is written by the BMC and read
136 by the host. The IDR is the obverse.
139 to determine if there is data in the ODR or IDR. These are single-bit flags,
141 hardware when data has been written to the corresponding ODR/IDR buffer (and
316 | 1 | The host writes a command value to IDR |
319 | 4 | If IBF is set, the BMC reads the host command from IDR |
/openbmc/linux/Documentation/ABI/testing/
H A Ddev-raw-kcs20 | 0 | IDR | ODR |
/openbmc/linux/drivers/iio/adc/
H A Dat91-sama5d2_adc.c126 u16 IDR; member
264 .IDR = 0x28,
299 .IDR = 0x28,
831 at91_adc_writel(st, IDR, BIT(channel)); in at91_adc_eoc_dis()
966 at91_adc_writel(st, IDR, in at91_adc_configure_touch()
1384 at91_adc_writel(st, IDR, AT91_SAMA5D2_IER_DRDY); in at91_adc_buffer_postdisable()
1649 at91_adc_writel(st, IDR, AT91_SAMA5D2_IER_PEN); in at91_adc_pen_detect_interrupt()
1663 at91_adc_writel(st, IDR, AT91_SAMA5D2_IER_NOPEN | in at91_adc_no_pen_detect_interrupt()
2163 at91_adc_writel(st, IDR, 0xffffffff); in at91_adc_hw_init()
/openbmc/linux/drivers/spi/
H A Dspi-at91-usart.c226 at91_usart_spi_writel(aus, IDR, US_IR_RXRDY); in at91_usart_spi_dma_transfer()
343 at91_usart_spi_writel(aus, IDR, US_IR_OVRE | US_IR_RXRDY); in at91_usart_spi_interrupt()
463 at91_usart_spi_writel(aus, IDR, US_OVRE_RXRDY_IRQS); in at91_usart_spi_unprepare_message()
H A Dspi-atmel.c858 spi_writel(as, IDR, SPI_BIT(OVRES)); in atmel_spi_next_xfer_dma_submit()
1135 spi_writel(as, IDR, SPI_BIT(OVRES)); in atmel_spi_pio_interrupt()
1163 spi_writel(as, IDR, pending); in atmel_spi_pio_interrupt()
1172 spi_writel(as, IDR, pending); in atmel_spi_pio_interrupt()
1194 spi_writel(as, IDR, (SPI_BIT(RXBUFF) | SPI_BIT(ENDRX) in atmel_spi_pdc_interrupt()
1207 spi_writel(as, IDR, pending); in atmel_spi_pdc_interrupt()
/openbmc/linux/drivers/net/usb/
H A Drtl8150.c21 #define IDR 0x0120 macro
270 ret = get_registers(dev, IDR, sizeof(node_id), node_id); in set_ethernet_addr()
292 set_registers(dev, IDR, netdev->addr_len, netdev->dev_addr); in rtl8150_set_mac_address()
737 set_registers(dev, IDR, 6, netdev->dev_addr); in rtl8150_open()
/openbmc/linux/drivers/net/ethernet/cadence/
H A Dmacb_main.c712 queue_writel(queue, IDR, in macb_mac_link_down()
1706 queue_writel(queue, IDR, bp->rx_intr_mask); in macb_rx_poll()
1792 queue_writel(queue, IDR, MACB_BIT(TCOMP)); in macb_tx_poll()
1812 queue_writel(queue, IDR, bp->rx_intr_mask | in macb_hresp_error_task()
1856 queue_writel(queue, IDR, MACB_BIT(WOL)); in macb_wol_interrupt()
1885 queue_writel(queue, IDR, GEM_BIT(WOL)); in gem_wol_interrupt()
1917 queue_writel(queue, IDR, -1); in macb_interrupt()
1934 queue_writel(queue, IDR, bp->rx_intr_mask); in macb_interrupt()
1946 queue_writel(queue, IDR, MACB_BIT(TCOMP)); in macb_interrupt()
1963 queue_writel(queue, IDR, MACB_TX_INT_FLAG in macb_interrupt()
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H A Dmacb.h389 /* Bitfields in ISR/IER/IDR/IMR */
1209 unsigned int IDR; member
/openbmc/linux/drivers/misc/
H A Datmel-ssc.c229 ssc_writel(ssc->regs, IDR, -1); in ssc_probe()
/openbmc/linux/drivers/iommu/
H A Dmsm_iommu_hw-8xxx.h116 #define GET_IDR(b) GET_GLOBAL_REG(IDR, (b))
368 #define GET_NM2VCBMT(b) GET_GLOBAL_FIELD(b, IDR, NM2VCBMT)
369 #define GET_HTW(b) GET_GLOBAL_FIELD(b, IDR, HTW)
370 #define GET_HUM(b) GET_GLOBAL_FIELD(b, IDR, HUM)
371 #define GET_TLBSIZE(b) GET_GLOBAL_FIELD(b, IDR, TLBSIZE)
372 #define GET_NCB(b) GET_GLOBAL_FIELD(b, IDR, NCB)
373 #define GET_NIRPT(b) GET_GLOBAL_FIELD(b, IDR, NIRPT)
819 #define IDR (0xFFFF8) macro
/openbmc/docs/designs/
H A Dbmc-service-failure-debug-and-recovery.md319 3. Read `IDR`. The hardware clears IBF as a result
335 4. Write 0x44 (`D` for "Debug") to the Input Data Register (IDR). The hardware
359 protocol only requires the host to write to IDR and periodically poll STR for
386 writing the appropriate value to the Input Data Register (IDR). All the proposed
388 reduced to reading an appropriate value from IDR. Reducing requirements on the
/openbmc/linux/sound/soc/atmel/
H A Datmel_ssc_dai.c728 ssc_writel(ssc_p->ssc->regs, IDR, dma_params->mask->ssc_error); in atmel_ssc_prepare()
781 ssc_writel(ssc_p->ssc->regs, IDR, ssc_p->ssc_state.ssc_imr); in atmel_ssc_suspend()
/openbmc/linux/Documentation/userspace-api/media/v4l/
H A Dext-ctrls-codec.rst1375 GOP this is the period between two I-frames. The period between IDR
1377 control. An IDR frame, which stands for Instantaneous Decoding
1379 This means that a stream can be restarted from an IDR frame without
2544 - Use IDR (Instantaneous Decoding Refresh) picture encoding.
2553 This specifies the number of I pictures between two CRA/IDR pictures.
2658 Indicates whether to generate SPS and PPS at every IDR. Setting it to 0
2659 disables generating SPS and PPS at every IDR. Setting it to one enables
2660 generating SPS and PPS at every IDR.
H A Ddev-decoder.rst102 IDR
132 SPS/PPS/IDR sequence (H.264/HEVC); a resume point is required to start decode
/openbmc/qemu/hw/misc/
H A Dxlnx-versal-pmc-iou-slcr.c684 REG32(IDR, 0x80c)
685 FIELD(IDR, ADDR_DECODE_ERR, 0, 1)
/openbmc/linux/sound/spi/
H A Dat73c213.c287 ssc_writel(chip->ssc->regs, IDR, SSC_BIT(IDR_ENDTX)); in snd_at73c213_pcm_trigger()
/openbmc/qemu/hw/net/
H A Dcadence_gem.c193 REG32(IDR, 0x2c) /* Interrupt Disable reg */

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