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Searched refs:IDC_ENABLE (Results 1 – 6 of 6) sorted by relevance

/openbmc/u-boot/arch/powerpc/cpu/mpc8xx/
H A Dcache.c22 mtspr(IC_CST, IDC_ENABLE); in icache_enable()
40 mtspr(DC_CST, IDC_ENABLE); in dcache_enable()
H A Dcpu.c131 wr_ic_cst(IDC_ENABLE); in checkicache()
169 wr_dc_cst(IDC_ENABLE); in checkdcache()
H A Dstart.S108 lis r3, IDC_ENABLE@h /* Enable instruction cache */
/openbmc/linux/arch/powerpc/include/asm/
H A Dreg_8xx.h60 #define IDC_ENABLE 0x02000000 /* Cache enable */ macro
/openbmc/u-boot/arch/powerpc/include/asm/
H A Dcache.h88 #define IDC_ENABLE 0x02000000 /* Cache enable */ macro
/openbmc/linux/arch/powerpc/kernel/
H A Dhead_8xx.S678 lis r8, IDC_ENABLE@h