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Searched refs:ICMR (Results 1 – 10 of 10) sorted by relevance

/openbmc/linux/drivers/irqchip/
H A Dirq-sa11x0.c22 #define ICMR 0x04 /* IC Mask Reg. */ macro
38 reg = readl_relaxed(iobase + ICMR); in sa1100_mask_irq()
40 writel_relaxed(reg, iobase + ICMR); in sa1100_mask_irq()
47 reg = readl_relaxed(iobase + ICMR); in sa1100_unmask_irq()
49 writel_relaxed(reg, iobase + ICMR); in sa1100_unmask_irq()
93 st->icmr = readl_relaxed(iobase + ICMR); in sa1100irq_suspend()
100 writel_relaxed(st->icmr & 0xfffff000, iobase + ICMR); in sa1100irq_suspend()
113 writel_relaxed(st->icmr, iobase + ICMR); in sa1100irq_resume()
137 icmr = readl_relaxed(iobase + ICMR); in sa1100_handle_irq()
155 writel_relaxed(0, iobase + ICMR); in sa11x0_init_irq_nodt()
/openbmc/linux/arch/arm/mach-pxa/
H A Dirq.c30 #define ICMR (0x004) macro
69 uint32_t icmr = __raw_readl(base + ICMR); in pxa_mask_irq()
72 __raw_writel(icmr, base + ICMR); in pxa_mask_irq()
79 uint32_t icmr = __raw_readl(base + ICMR); in pxa_unmask_irq()
82 __raw_writel(icmr, base + ICMR); in pxa_unmask_irq()
98 icmr = __raw_readl(pxa_irq_base + ICMR); in icip_handle_irq()
160 __raw_writel(0, base + ICMR); /* disable all IRQs */ in pxa_init_irq_common()
189 saved_icmr[i] = __raw_readl(base + ICMR); in pxa_irq_suspend()
190 __raw_writel(0, base + ICMR); in pxa_irq_suspend()
208 __raw_writel(saved_icmr[i], base + ICMR); in pxa_irq_resume()
/openbmc/u-boot/arch/arm/cpu/sa1100/
H A Dstart.S69 #define ICMR 0x04 macro
91 str r1, [r0, #ICMR]
/openbmc/linux/arch/arm/mach-sa1100/include/mach/
H A Dmtd-xip.h17 #define xip_irqpending() (ICIP & ICMR)
H A DSA-1100.h1211 #define ICMR __REG(0x90050004) /* IC Mask Reg. */ macro
/openbmc/linux/arch/arm/mach-sa1100/
H A Dpm.c95 ICMR = 0; in sa11x0_pm_enter()
/openbmc/u-boot/arch/arm/cpu/pxa/
H A Dpxa2xx.c219 writel(0, ICMR); in pxa_interrupt_setup()
/openbmc/qemu/hw/arm/
H A Dstrongarm.c97 #define ICMR 0x04 macro
136 case ICMR: in strongarm_pic_mem_read()
160 case ICMR: in strongarm_pic_mem_write()
/openbmc/u-boot/arch/arm/include/asm/arch-pxa/
H A Dpxa-regs.h1139 #define ICMR 0x40D00004 /* Interrupt Controller Mask Register */ macro
/openbmc/u-boot/include/
H A DSA-1100.h1636 #define ICMR /* IC Mask Reg. */ \ macro