xref: /openbmc/linux/drivers/mtd/nand/raw/gpmi-nand/bch-regs.h (revision 58e16d792a6a8c6b750f637a4649967fcac853dc)
1  /* SPDX-License-Identifier: GPL-2.0-or-later */
2  /*
3   * Freescale GPMI NAND Flash Driver
4   *
5   * Copyright 2008-2011 Freescale Semiconductor, Inc.
6   * Copyright 2008 Embedded Alley Solutions, Inc.
7   */
8  #ifndef __GPMI_NAND_BCH_REGS_H
9  #define __GPMI_NAND_BCH_REGS_H
10  
11  #define HW_BCH_CTRL				0x00000000
12  #define HW_BCH_CTRL_SET				0x00000004
13  #define HW_BCH_CTRL_CLR				0x00000008
14  #define HW_BCH_CTRL_TOG				0x0000000c
15  
16  #define BM_BCH_CTRL_COMPLETE_IRQ_EN		(1 << 8)
17  #define BM_BCH_CTRL_COMPLETE_IRQ		(1 << 0)
18  
19  #define HW_BCH_STATUS0				0x00000010
20  #define HW_BCH_MODE				0x00000020
21  #define HW_BCH_ENCODEPTR			0x00000030
22  #define HW_BCH_DATAPTR				0x00000040
23  #define HW_BCH_METAPTR				0x00000050
24  #define HW_BCH_LAYOUTSELECT			0x00000070
25  
26  #define HW_BCH_FLASH0LAYOUT0			0x00000080
27  
28  #define BP_BCH_FLASH0LAYOUT0_NBLOCKS		24
29  #define BM_BCH_FLASH0LAYOUT0_NBLOCKS	(0xff << BP_BCH_FLASH0LAYOUT0_NBLOCKS)
30  #define BF_BCH_FLASH0LAYOUT0_NBLOCKS(v)		\
31  	(((v) << BP_BCH_FLASH0LAYOUT0_NBLOCKS) & BM_BCH_FLASH0LAYOUT0_NBLOCKS)
32  
33  #define BP_BCH_FLASH0LAYOUT0_META_SIZE		16
34  #define BM_BCH_FLASH0LAYOUT0_META_SIZE	(0xff << BP_BCH_FLASH0LAYOUT0_META_SIZE)
35  #define BF_BCH_FLASH0LAYOUT0_META_SIZE(v)	\
36  	(((v) << BP_BCH_FLASH0LAYOUT0_META_SIZE)\
37  					 & BM_BCH_FLASH0LAYOUT0_META_SIZE)
38  
39  #define BP_BCH_FLASH0LAYOUT0_ECC0		12
40  #define BM_BCH_FLASH0LAYOUT0_ECC0	(0xf << BP_BCH_FLASH0LAYOUT0_ECC0)
41  #define MX6Q_BP_BCH_FLASH0LAYOUT0_ECC0		11
42  #define MX6Q_BM_BCH_FLASH0LAYOUT0_ECC0	(0x1f << MX6Q_BP_BCH_FLASH0LAYOUT0_ECC0)
43  #define BF_BCH_FLASH0LAYOUT0_ECC0(v, x)				\
44  	(GPMI_IS_MX6(x)					\
45  		? (((v) << MX6Q_BP_BCH_FLASH0LAYOUT0_ECC0)	\
46  			& MX6Q_BM_BCH_FLASH0LAYOUT0_ECC0)	\
47  		: (((v) << BP_BCH_FLASH0LAYOUT0_ECC0)		\
48  			& BM_BCH_FLASH0LAYOUT0_ECC0)		\
49  	)
50  
51  #define MX6Q_BP_BCH_FLASH0LAYOUT0_GF_13_14	10
52  #define MX6Q_BM_BCH_FLASH0LAYOUT0_GF_13_14			\
53  				(0x1 << MX6Q_BP_BCH_FLASH0LAYOUT0_GF_13_14)
54  #define BF_BCH_FLASH0LAYOUT0_GF(v, x)				\
55  	((GPMI_IS_MX6(x) && ((v) == 14))			\
56  		? (((1) << MX6Q_BP_BCH_FLASH0LAYOUT0_GF_13_14)	\
57  			& MX6Q_BM_BCH_FLASH0LAYOUT0_GF_13_14)	\
58  		: 0						\
59  	)
60  
61  #define BP_BCH_FLASH0LAYOUT0_DATA0_SIZE		0
62  #define BM_BCH_FLASH0LAYOUT0_DATA0_SIZE		\
63  			(0xfff << BP_BCH_FLASH0LAYOUT0_DATA0_SIZE)
64  #define MX6Q_BM_BCH_FLASH0LAYOUT0_DATA0_SIZE	\
65  			(0x3ff << BP_BCH_FLASH0LAYOUT0_DATA0_SIZE)
66  #define BF_BCH_FLASH0LAYOUT0_DATA0_SIZE(v, x)				\
67  	(GPMI_IS_MX6(x)						\
68  		? (((v) >> 2) & MX6Q_BM_BCH_FLASH0LAYOUT0_DATA0_SIZE)	\
69  		: ((v) & BM_BCH_FLASH0LAYOUT0_DATA0_SIZE)		\
70  	)
71  
72  #define HW_BCH_FLASH0LAYOUT1			0x00000090
73  
74  #define BP_BCH_FLASH0LAYOUT1_PAGE_SIZE		16
75  #define BM_BCH_FLASH0LAYOUT1_PAGE_SIZE		\
76  			(0xffff << BP_BCH_FLASH0LAYOUT1_PAGE_SIZE)
77  #define BF_BCH_FLASH0LAYOUT1_PAGE_SIZE(v)	\
78  	(((v) << BP_BCH_FLASH0LAYOUT1_PAGE_SIZE) \
79  					 & BM_BCH_FLASH0LAYOUT1_PAGE_SIZE)
80  
81  #define BP_BCH_FLASH0LAYOUT1_ECCN		12
82  #define BM_BCH_FLASH0LAYOUT1_ECCN	(0xf << BP_BCH_FLASH0LAYOUT1_ECCN)
83  #define MX6Q_BP_BCH_FLASH0LAYOUT1_ECCN		11
84  #define MX6Q_BM_BCH_FLASH0LAYOUT1_ECCN	(0x1f << MX6Q_BP_BCH_FLASH0LAYOUT1_ECCN)
85  #define BF_BCH_FLASH0LAYOUT1_ECCN(v, x)				\
86  	(GPMI_IS_MX6(x)					\
87  		? (((v) << MX6Q_BP_BCH_FLASH0LAYOUT1_ECCN)	\
88  			& MX6Q_BM_BCH_FLASH0LAYOUT1_ECCN)	\
89  		: (((v) << BP_BCH_FLASH0LAYOUT1_ECCN)		\
90  			& BM_BCH_FLASH0LAYOUT1_ECCN)		\
91  	)
92  
93  #define MX6Q_BP_BCH_FLASH0LAYOUT1_GF_13_14	10
94  #define MX6Q_BM_BCH_FLASH0LAYOUT1_GF_13_14			\
95  				(0x1 << MX6Q_BP_BCH_FLASH0LAYOUT1_GF_13_14)
96  #define BF_BCH_FLASH0LAYOUT1_GF(v, x)				\
97  	((GPMI_IS_MX6(x) && ((v) == 14))			\
98  		? (((1) << MX6Q_BP_BCH_FLASH0LAYOUT1_GF_13_14)	\
99  			& MX6Q_BM_BCH_FLASH0LAYOUT1_GF_13_14)	\
100  		: 0						\
101  	)
102  
103  #define BP_BCH_FLASH0LAYOUT1_DATAN_SIZE		0
104  #define BM_BCH_FLASH0LAYOUT1_DATAN_SIZE		\
105  			(0xfff << BP_BCH_FLASH0LAYOUT1_DATAN_SIZE)
106  #define MX6Q_BM_BCH_FLASH0LAYOUT1_DATAN_SIZE	\
107  			(0x3ff << BP_BCH_FLASH0LAYOUT1_DATAN_SIZE)
108  #define BF_BCH_FLASH0LAYOUT1_DATAN_SIZE(v, x)				\
109  	(GPMI_IS_MX6(x)						\
110  		? (((v) >> 2) & MX6Q_BM_BCH_FLASH0LAYOUT1_DATAN_SIZE)	\
111  		: ((v) & BM_BCH_FLASH0LAYOUT1_DATAN_SIZE)		\
112  	)
113  
114  #define HW_BCH_VERSION				0x00000160
115  #endif
116