Searched refs:HVS_READ (Results 1 – 4 of 4) sorted by relevance
119 dispstat = VC4_GET_FIELD(HVS_READ(SCALER_DISPSTATX(i)), in vc4_hvs_debugfs_dlist()130 for (j = HVS_READ(SCALER_DISPLISTX(i)); j < dlist_mem_size; j++) { in vc4_hvs_debugfs_dlist()276 field = VC4_GET_FIELD(HVS_READ(SCALER_DISPSTAT1), in vc4_hvs_get_fifo_frame_count()280 field = VC4_GET_FIELD(HVS_READ(SCALER_DISPSTAT1), in vc4_hvs_get_fifo_frame_count()284 field = VC4_GET_FIELD(HVS_READ(SCALER_DISPSTAT2), in vc4_hvs_get_fifo_frame_count()316 reg = HVS_READ(SCALER_DISPECTRL); in vc4_hvs_get_fifo_from_output()324 reg = HVS_READ(SCALER_DISPCTRL); in vc4_hvs_get_fifo_from_output()332 reg = HVS_READ(SCALER_DISPEOLN); in vc4_hvs_get_fifo_from_output()340 reg = HVS_READ(SCALER_DISPDITHER); in vc4_hvs_get_fifo_from_output()378 dispbkgndx = HVS_READ(SCALER_DISPBKGNDX(chan)); in vc4_hvs_init_channel()[all …]
243 dispctrl = HVS_READ(SCALER_DISPCTRL) & in vc4_hvs_pv_muxing_commit()270 VC4_GET_FIELD(HVS_READ(SCALER_DISPCTRL), in vc5_hvs_pv_muxing_commit()274 reg = HVS_READ(SCALER_DISPECTRL); in vc5_hvs_pv_muxing_commit()286 reg = HVS_READ(SCALER_DISPCTRL); in vc5_hvs_pv_muxing_commit()298 reg = HVS_READ(SCALER_DISPEOLN); in vc5_hvs_pv_muxing_commit()311 reg = HVS_READ(SCALER_DISPDITHER); in vc5_hvs_pv_muxing_commit()
86 u32 dispbase = HVS_READ(SCALER_DISPBASEX(channel)); in vc4_crtc_get_cob_allocation()124 val = HVS_READ(SCALER_DISPSTATX(vc4_crtc_state->assigned_channel)); in vc4_crtc_get_scanout_position()461 WARN_ON_ONCE((HVS_READ(SCALER_DISPCTRL) & SCALER_DISPCTRL_ENABLE) != in require_hvs_enabled()790 (vc4_crtc->current_dlist == HVS_READ(SCALER_DISPLACTX(chan)) || in vc4_crtc_handle_page_flip()
631 #define HVS_READ(offset) \ macro