Searched refs:HOST_RESET (Results 1 – 6 of 6) sorted by relevance
/openbmc/u-boot/include/ |
H A D | ahci.h | 39 #define HOST_RESET (1 << 0) /* reset controller; self-clear */ macro
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/openbmc/u-boot/drivers/ata/ |
H A D | ahci.c | 153 if ((tmp & HOST_RESET) == 0) in ahci_reset() 154 writel_with_flush(tmp | HOST_RESET, host_ctl_reg); in ahci_reset() 164 } while ((i > 0) && (tmp & HOST_RESET)); in ahci_reset()
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/openbmc/linux/drivers/ufs/core/ |
H A D | ufs-debugfs.c | 53 PRT("Host Resets: %llu\n", HOST_RESET); in ufs_debugfs_stats_show()
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/openbmc/linux/drivers/ata/ |
H A D | ahci.h | 80 HOST_RESET = BIT(0), /* reset controller; self-clear */ enumerator
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H A D | libahci.c | 991 if (!(tmp & HOST_RESET)) { in ahci_reset_controller() 992 writel(tmp | HOST_RESET, mmio + HOST_CTL); in ahci_reset_controller() 1001 tmp = ata_wait_register(NULL, mmio + HOST_CTL, HOST_RESET, in ahci_reset_controller() 1002 HOST_RESET, 10, 1000); in ahci_reset_controller() 1003 if (tmp & HOST_RESET) { in ahci_reset_controller()
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/openbmc/linux/drivers/block/mtip32xx/ |
H A D | mtip32xx.c | 172 writel(HOST_RESET, dd->mmio + HOST_CTL); in mtip_hba_reset() 187 } while ((readl(dd->mmio + HOST_CTL) & HOST_RESET) in mtip_hba_reset() 190 if (readl(dd->mmio + HOST_CTL) & HOST_RESET) in mtip_hba_reset()
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