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Searched refs:HCLK_ISP (Results 1 – 18 of 18) sorted by relevance

/openbmc/u-boot/include/dt-bindings/clock/
H A Drk3368-cru.h174 #define HCLK_ISP 469 macro
H A Drv1108-cru.h158 #define HCLK_ISP 336 macro
H A Drk3288-cru.h179 #define HCLK_ISP 469 macro
/openbmc/linux/include/dt-bindings/clock/
H A Drv1108-cru.h155 #define HCLK_ISP 336 macro
H A Dpx30-cru.h126 #define HCLK_ISP 250 macro
H A Drk3368-cru.h174 #define HCLK_ISP 469 macro
H A Drk3288-cru.h187 #define HCLK_ISP 469 macro
H A Drockchip,rv1126-cru.h285 #define HCLK_ISP 221 macro
H A Drk3568-cru.h274 #define HCLK_ISP 211 macro
/openbmc/linux/arch/arm64/boot/dts/rockchip/
H A Drk3368.dtsi662 <&cru HCLK_ISP>,
839 clocks = <&cru ACLK_ISP>, <&cru HCLK_ISP>;
H A Dpx30.dtsi336 <&cru HCLK_ISP>,
1254 <&cru HCLK_ISP>,
1279 clocks = <&cru ACLK_ISP>, <&cru HCLK_ISP>;
/openbmc/linux/drivers/clk/rockchip/
H A Dclk-rv1108.c479 GATE(HCLK_ISP, "hclk_isp", "hclk_vio_pre", 0,
H A Dclk-rk3368.c734 GATE(HCLK_ISP, "hclk_isp", "sclk_isp", 0, RK3368_CLKGATE_CON(16), 14, GFLAGS),
H A Dclk-rk3288.c791 GATE(HCLK_ISP, "hclk_isp", "hclk_vio", 0, RK3288_CLKGATE_CON(16), 1, GFLAGS),
H A Dclk-px30.c812 GATE(HCLK_ISP, "hclk_isp", "hclk_vi_pre", 0, PX30_CLKGATE_CON(5), 4, GFLAGS),
H A Dclk-rk3568.c1015 GATE(HCLK_ISP, "hclk_isp", "hclk_vi", 0,
/openbmc/linux/arch/arm/boot/dts/rockchip/
H A Drk3288.dtsi779 <&cru HCLK_ISP>,
1001 clocks = <&cru ACLK_ISP>, <&cru HCLK_ISP>;
/openbmc/u-boot/arch/arm/dts/
H A Drk3288.dtsi1555 <&cru HCLK_ISP>,