Searched refs:GPIO_BANK0_REG_CLR_ADDR (Results 1 – 2 of 2) sorted by relevance
402 writel(0x01 << 11, GPIO_BANK0_REG_CLR_ADDR); in board_init()
156 #define GPIO_BANK0_REG_CLR_ADDR (DAVINCI_GPIO_BASE + 0x1c) macro