Searched refs:GICD_ICPENDR (Results 1 – 9 of 9) sorted by relevance
| /openbmc/qemu/hw/intc/ |
| H A D | arm_gicv3_dist.c | 475 case GICD_ICPENDR ... GICD_ICPENDR + 0x7f: in gicd_readl()
477 offset - GICD_ICPENDR); in gicd_readl()
683 case GICD_ICPENDR ... GICD_ICPENDR + 0x7f: in gicd_writel()
685 offset - GICD_ICPENDR, value); in gicd_writel()
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| H A D | gicv3_internal.h | 44 #define GICD_ICPENDR 0x0280 macro
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| H A D | arm_gicv3_kvm.c | 447 kvm_dist_putbmp(s, GICD_ISPENDR, GICD_ICPENDR, s->pending); in kvm_arm_gicv3_put()
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| /openbmc/linux/tools/testing/selftests/kvm/include/aarch64/ |
| H A D | gic_v3.h | 20 #define GICD_ICPENDR 0x0280 macro
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| /openbmc/linux/include/linux/irqchip/ |
| H A D | arm-gic-v3.h | 26 #define GICD_ICPENDR 0x0280 macro
234 #define GICR_ICPENDR0 GICD_ICPENDR
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| /openbmc/linux/tools/testing/selftests/kvm/lib/aarch64/ |
| H A D | gic_v3.c | 258 gicv3_write_reg(intid, GICD_ICPENDR, 32, 1, 1); in gicv3_irq_clear_pending()
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| /openbmc/linux/Documentation/virt/kvm/devices/ |
| H A D | arm-vgic-v3.rst | 99 GICR_ISPENDR0, GICD_ICPENDR, and GICR_ICPENDR0. These registers behave
159 Accesses to GICD_ICPENDR register region and GICR_ICPENDR0 registers have
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| /openbmc/linux/drivers/irqchip/ |
| H A D | irq-gic-v3.c | 349 case GICD_ICPENDR: in convert_offset_index()
451 reg = val ? GICD_ISPENDR : GICD_ICPENDR; in gic_irq_set_irqchip_state()
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| /openbmc/linux/arch/arm64/kvm/vgic/ |
| H A D | vgic-mmio-v3.c | 647 REGISTER_DESC_WITH_BITS_PER_IRQ_SHARED(GICD_ICPENDR,
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