/openbmc/linux/sound/arm/ |
H A D | pxa2xx-ac97-lib.c | 127 writel(readl(ac97_reg_base + GCR) | (GCR_WARM_RST), ac97_reg_base + GCR); in pxa_ac97_warm_pxa25x() 132 …writel(readl(ac97_reg_base + GCR) & ( GCR_COLD_RST), ac97_reg_base + GCR); /* clear everything bu… in pxa_ac97_cold_pxa25x() 133 writel(readl(ac97_reg_base + GCR) & (~GCR_COLD_RST), ac97_reg_base + GCR); /* then assert nCRST */ in pxa_ac97_cold_pxa25x() 137 writel(GCR_COLD_RST, ac97_reg_base + GCR); in pxa_ac97_cold_pxa25x() 149 writel(readl(ac97_reg_base + GCR) | (GCR_WARM_RST), ac97_reg_base + GCR); in pxa_ac97_warm_pxa27x() 156 …writel(readl(ac97_reg_base + GCR) & ( GCR_COLD_RST), ac97_reg_base + GCR); /* clear everything bu… in pxa_ac97_cold_pxa27x() 157 writel(readl(ac97_reg_base + GCR) & (~GCR_COLD_RST), ac97_reg_base + GCR); /* then assert nCRST */ in pxa_ac97_cold_pxa27x() 165 writel(GCR_COLD_RST | GCR_WARM_RST, ac97_reg_base + GCR); in pxa_ac97_cold_pxa27x() 175 writel(readl(ac97_reg_base + GCR) | (GCR_WARM_RST), ac97_reg_base + GCR); in pxa_ac97_warm_pxa3xx() 181 writel(0, ac97_reg_base + GCR); in pxa_ac97_cold_pxa3xx() [all …]
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H A D | pxa2xx-ac97-regs.h | 21 #define GCR (0x000C) /* Global Control Register */ macro
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/openbmc/linux/arch/arm/mach-omap2/ |
H A D | dma.c | 37 [GCR] = { 0x0078, 0x00, OMAP_DMA_REG_32BIT },
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/openbmc/openbmc/poky/meta/recipes-gnome/gcr/ |
H A D | gcr_4.3.0.bb | 2 DESCRIPTION = "GCR is a library for displaying certificates, and crypto UI, \
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/openbmc/linux/drivers/net/wireless/atmel/ |
H A D | atmel.c | 123 #define GCR 0x00 /* (SIR0) General Configuration Register */ macro 1378 atmel_write16(dev, GCR, 0x0060); in atmel_close() 1379 atmel_write16(dev, GCR, 0x0040); in atmel_close() 1630 atmel_write16(dev, GCR, 0x0060); in stop_atmel_card() 1631 atmel_write16(dev, GCR, 0x0040); in stop_atmel_card() 3672 atmel_write16(dev, GCR, 0x0060); in probe_atmel_card() 3674 atmel_write16(dev, GCR, 0x0040); in probe_atmel_card() 3699 atmel_write16(dev, GCR, 0x0060); in probe_atmel_card() 3700 atmel_write16(dev, GCR, 0x0040); in probe_atmel_card() 3722 atmel_write16(dev, GCR, 0x0060); in probe_atmel_card() [all …]
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/openbmc/openbmc/meta-openembedded/meta-oe/recipes-gnome/gcr/ |
H A D | gcr3_3.41.2.bb | 2 DESCRIPTION = "GCR is a library for displaying certificates, and crypto UI, \
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/openbmc/linux/drivers/net/ethernet/intel/e1000e/ |
H A D | 82571.c | 1114 reg_data = er32(GCR); in e1000_init_hw_82571() 1116 ew32(GCR, reg_data); in e1000_init_hw_82571() 1246 reg = er32(GCR); in e1000_initialize_hw_bits_82571() 1248 ew32(GCR, reg); in e1000_initialize_hw_bits_82571()
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H A D | mac.c | 1679 gcr = er32(GCR); in e1000e_set_pcie_no_snoop() 1682 ew32(GCR, gcr); in e1000e_set_pcie_no_snoop()
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/openbmc/linux/include/linux/ |
H A D | omap-dma.h | 140 GCR, GSCR, GRST1, HW_ID, enumerator
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/openbmc/qemu/hw/net/ |
H A D | e1000_common.h | 55 defreg(GCR), defreg(TIMINCA), defreg(EIAC), defreg(CTRL_EXT),
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H A D | igb_common.h | 80 defreg(GCR), defreg(TIMINCA), defreg(EIAC), defreg(CTRL_EXT),
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H A D | e1000e_core.c | 2845 uint32_t ro_bits = core->mac[GCR] & E1000_GCR_RO_BITS; in e1000e_set_gcr() 2846 core->mac[GCR] = (val & ~E1000_GCR_RO_BITS) | ro_bits; in e1000e_set_gcr() 2998 e1000e_getreg(GCR), 3183 [GCR] = e1000e_set_gcr, 3434 [GCR] = E1000_L0S_ADJUST |
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H A D | igb_core.c | 3076 uint32_t ro_bits = core->mac[GCR] & E1000_GCR_RO_BITS; in igb_set_gcr() 3077 core->mac[GCR] = (val & ~E1000_GCR_RO_BITS) | ro_bits; in igb_set_gcr() 3534 igb_getreg(GCR), 3945 [GCR] = igb_set_gcr, 4391 [GCR] = E1000_L0S_ADJUST |
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/openbmc/u-boot/arch/arm/mach-uniphier/dram/ |
H A D | cmd_ddrphy.c | 256 DX_REG_DUMP(dx, GCR); in reg_dump()
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/openbmc/qemu/docs/system/arm/ |
H A D | nuvoton.rst | 37 * System Global Control Registers (GCR)
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/openbmc/linux/arch/arm/mach-omap1/ |
H A D | dma.c | 36 [GCR] = { 0x0400, 0x00, OMAP_DMA_REG_16BIT },
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/openbmc/linux/drivers/net/ethernet/via/ |
H A D | via-velocity.c | 3082 u8 GCR; in velocity_set_wol() local 3083 GCR = readb(®s->CHIPGCR); in velocity_set_wol() 3084 GCR = (GCR & ~CHIPGCR_FCGMII) | CHIPGCR_FCFDX; in velocity_set_wol() 3085 writeb(GCR, ®s->CHIPGCR); in velocity_set_wol()
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/openbmc/linux/drivers/dma/ti/ |
H A D | omap-dma.c | 1581 od->context.gcr = omap_dma_glbl_read(od, GCR); in omap_dma_context_save() 1588 omap_dma_glbl_write(od, GCR, od->context.gcr); in omap_dma_context_restore() 1644 omap_dma_glbl_write(od, GCR, val); in omap_dma_init_gcr()
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/openbmc/linux/drivers/tty/serial/ |
H A D | fsl_linflexuart.c | 41 #define GCR 0x004C /* Global control register */ macro
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/openbmc/u-boot/arch/mips/ |
H A D | Kconfig | 245 hex "MIPS CM GCR Base Address"
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/openbmc/u-boot/arch/arm/include/asm/arch-pxa/ |
H A D | pxa-regs.h | 373 #define GCR 0x4050000C /* Global Control Register */ macro
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/openbmc/u-boot/drivers/net/ |
H A D | e1000.c | 2032 reg_data = E1000_READ_REG(hw, GCR); in e1000_init_hw() 2034 E1000_WRITE_REG(hw, GCR, reg_data); in e1000_init_hw()
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/openbmc/linux/ |
H A D | opengrok0.0.log | [all...] |