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Searched refs:GCC_QUPV3_WRAP0_S7_CLK (Results 1 – 25 of 32) sorted by relevance

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/openbmc/linux/include/dt-bindings/clock/
H A Dqcom,qdu1000-gcc.h80 #define GCC_QUPV3_WRAP0_S7_CLK 70 macro
H A Dqcom,sm7150-gcc.h85 #define GCC_QUPV3_WRAP0_S7_CLK 73 macro
H A Dqcom,sdx75-gcc.h125 #define GCC_QUPV3_WRAP0_S7_CLK 115 macro
H A Dqcom,gcc-sc7280.h94 #define GCC_QUPV3_WRAP0_S7_CLK 84 macro
H A Dqcom,gcc-sm8450.h112 #define GCC_QUPV3_WRAP0_S7_CLK 100 macro
H A Dqcom,gcc-sm8150.h105 #define GCC_QUPV3_WRAP0_S7_CLK 95 macro
H A Dqcom,gcc-sdm845.h92 #define GCC_QUPV3_WRAP0_S7_CLK 82 macro
H A Dqcom,gcc-sm8350.h103 #define GCC_QUPV3_WRAP0_S7_CLK 91 macro
H A Dqcom,gcc-sm8250.h111 #define GCC_QUPV3_WRAP0_S7_CLK 101 macro
H A Dqcom,gcc-sc8180x.h120 #define GCC_QUPV3_WRAP0_S7_CLK 110 macro
H A Dqcom,gcc-sc8280xp.h207 #define GCC_QUPV3_WRAP0_S7_CLK 196 macro
/openbmc/linux/arch/arm64/boot/dts/qcom/
H A Dsc8180x.dtsi1097 clocks = <&gcc GCC_QUPV3_WRAP0_S7_CLK>;
1112 clocks = <&gcc GCC_QUPV3_WRAP0_S7_CLK>;
1126 clocks = <&gcc GCC_QUPV3_WRAP0_S7_CLK>;
H A Dqdu1000.dtsi591 clocks = <&gcc GCC_QUPV3_WRAP0_S7_CLK>;
H A Dsdm845.dtsi1678 clocks = <&gcc GCC_QUPV3_WRAP0_S7_CLK>;
1693 clocks = <&gcc GCC_QUPV3_WRAP0_S7_CLK>;
1712 clocks = <&gcc GCC_QUPV3_WRAP0_S7_CLK>;
H A Dsdm670.dtsi844 clocks = <&gcc GCC_QUPV3_WRAP0_S7_CLK>;
H A Dsc7280.dtsi1417 clocks = <&gcc GCC_QUPV3_WRAP0_S7_CLK>;
1440 clocks = <&gcc GCC_QUPV3_WRAP0_S7_CLK>;
1461 clocks = <&gcc GCC_QUPV3_WRAP0_S7_CLK>;
H A Dsm8350.dtsi1195 clocks = <&gcc GCC_QUPV3_WRAP0_S7_CLK>;
1211 clocks = <&gcc GCC_QUPV3_WRAP0_S7_CLK>;
H A Dsm8150.dtsi1228 clocks = <&gcc GCC_QUPV3_WRAP0_S7_CLK>;
1245 clocks = <&gcc GCC_QUPV3_WRAP0_S7_CLK>;
/openbmc/linux/drivers/clk/qcom/
H A Dgcc-sdm845.c3591 [GCC_QUPV3_WRAP0_S7_CLK] = &gcc_qupv3_wrap0_s7_clk.clkr,
3763 [GCC_QUPV3_WRAP0_S7_CLK] = &gcc_qupv3_wrap0_s7_clk.clkr,
H A Dgcc-qdu1000.c2518 [GCC_QUPV3_WRAP0_S7_CLK] = &gcc_qupv3_wrap0_s7_clk.clkr,
H A Dgcc-sdx75.c2813 [GCC_QUPV3_WRAP0_S7_CLK] = &gcc_qupv3_wrap0_s7_clk.clkr,
H A Dgcc-sm7150.c2825 [GCC_QUPV3_WRAP0_S7_CLK] = &gcc_qupv3_wrap0_s7_clk.clkr,
H A Dgcc-sm8450.c3087 [GCC_QUPV3_WRAP0_S7_CLK] = &gcc_qupv3_wrap0_s7_clk.clkr,
H A Dgcc-sc7280.c3266 [GCC_QUPV3_WRAP0_S7_CLK] = &gcc_qupv3_wrap0_s7_clk.clkr,
H A Dgcc-sm8250.c3410 [GCC_QUPV3_WRAP0_S7_CLK] = &gcc_qupv3_wrap0_s7_clk.clkr,

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