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Searched refs:FSL_SRDSRSTCTL_RST (Results 1 – 1 of 1) sorted by relevance

/openbmc/u-boot/arch/powerpc/cpu/mpc83xx/
H A Dserdes.c44 #define FSL_SRDSRSTCTL_RST 0x80000000 macro
150 tmp |= FSL_SRDSRSTCTL_RST; in fsl_setup_serdes()