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Searched refs:FSL_SRDSRSTCTL_OFFS (Results 1 – 1 of 1) sorted by relevance

/openbmc/u-boot/arch/powerpc/cpu/mpc83xx/
H A Dserdes.c43 #define FSL_SRDSRSTCTL_OFFS 0x20 macro
69 tmp = in_be32(regs + FSL_SRDSRSTCTL_OFFS); in fsl_setup_serdes()
71 out_be32(regs + FSL_SRDSRSTCTL_OFFS, tmp); in fsl_setup_serdes()
74 out_be32(regs + FSL_SRDSRSTCTL_OFFS, tmp); in fsl_setup_serdes()
149 tmp = in_be32(regs + FSL_SRDSRSTCTL_OFFS); in fsl_setup_serdes()
151 out_be32(regs + FSL_SRDSRSTCTL_OFFS, tmp); in fsl_setup_serdes()