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Searched refs:FPU_CSR_DIV_S (Results 1 – 4 of 4) sorted by relevance

/openbmc/u-boot/arch/mips/include/asm/
H A Dmipsregs.h809 #define FPU_CSR_DIV_S 0x00000020 macro
/openbmc/linux/arch/loongarch/include/asm/
H A Dloongarch.h1454 #define FPU_CSR_DIV_S 0x00080000 macro
/openbmc/linux/arch/mips/include/asm/
H A Dmipsregs.h1191 #define FPU_CSR_DIV_S 0x00000020 macro
/openbmc/linux/arch/mips/math-emu/
H A Dcp1emu.c1956 rcsr |= FPU_CSR_DIV_X | FPU_CSR_DIV_S; in fpu_emu()