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Searched refs:FPCR_FZ16 (Results 1 – 3 of 3) sorted by relevance

/openbmc/qemu/target/arm/
H A Dvfp_helper.c114 if (changed & FPCR_FZ16) { in vfp_set_fpcr_to_host()
115 bool ftz_enabled = val & FPCR_FZ16; in vfp_set_fpcr_to_host()
230 val &= ~FPCR_FZ16; in vfp_set_fpcr_masked()
266 val &= FPCR_AHP | FPCR_DN | FPCR_FZ | FPCR_RMODE_MASK | FPCR_FZ16 | FPCR_EBF; in vfp_set_fpcr_masked()
H A Dcpu.h1716 #define FPCR_FZ16 (1 << 19) /* ARMv8.2+, FP16 flush-to-zero */ macro
1752 #define FPSCR_FPCR_MASK (FPCR_EEXC_MASK | FPCR_LEN_MASK | FPCR_FZ16 | \
/openbmc/qemu/hw/intc/
H A Darmv7m_nvic.c2126 mask |= FPCR_FZ16; in nvic_writel()