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Searched refs:ENGINE_WRITE (Results 1 – 5 of 5) sorted by relevance

/openbmc/linux/drivers/gpu/drm/i915/gt/
H A Dgen6_engine_cs.c427 ENGINE_WRITE(engine, RING_IMR, in gen6_irq_enable()
438 ENGINE_WRITE(engine, RING_IMR, ~engine->irq_keep_mask); in gen6_irq_disable()
444 ENGINE_WRITE(engine, RING_IMR, ~engine->irq_enable_mask); in hsw_irq_enable_vecs()
454 ENGINE_WRITE(engine, RING_IMR, ~0); in hsw_irq_disable_vecs()
H A Dintel_execlists_submission.c2502 ENGINE_WRITE(engine, RING_EMR, ~0u); in execlists_irq_handler()
2503 ENGINE_WRITE(engine, RING_EIR, eir); in execlists_irq_handler()
2818 ENGINE_WRITE(engine, RING_CONTEXT_STATUS_PTR, in reset_csb_pointers()
2842 ENGINE_WRITE(engine, RING_CONTEXT_STATUS_PTR, in reset_csb_pointers()
2893 ENGINE_WRITE(engine, RING_EMR, ~0u); in enable_error_interrupt()
2894 ENGINE_WRITE(engine, RING_EIR, ~0u); /* clear all existing errors */ in enable_error_interrupt()
2928 ENGINE_WRITE(engine, RING_EMR, ~I915_ERROR_INSTRUCTION); in enable_error_interrupt()
3261 ENGINE_WRITE(engine, RING_IMR, in gen8_logical_ring_enable_irq()
3268 ENGINE_WRITE(engine, RING_IMR, ~engine->irq_keep_mask); in gen8_logical_ring_disable_irq()
H A Dintel_engine.h79 #define ENGINE_WRITE(...) __ENGINE_WRITE_OP(write, __VA_ARGS__) macro
H A Dintel_ring_submission.c445 ENGINE_WRITE(request->engine, RING_TAIL, in i9xx_submit_request()
H A Dintel_engine_cs.c381 ENGINE_WRITE(engine, RING_HWSTAM, mask); in intel_engine_set_hwsp_writemask()