/openbmc/linux/tools/testing/selftests/kvm/include/x86_64/ |
H A D | hyperv.h | 89 KVM_X86_CPU_FEATURE(HYPERV_CPUID_FEATURES, 0, EAX, 0) 91 KVM_X86_CPU_FEATURE(HYPERV_CPUID_FEATURES, 0, EAX, 1) 93 KVM_X86_CPU_FEATURE(HYPERV_CPUID_FEATURES, 0, EAX, 2) 95 KVM_X86_CPU_FEATURE(HYPERV_CPUID_FEATURES, 0, EAX, 3) 97 KVM_X86_CPU_FEATURE(HYPERV_CPUID_FEATURES, 0, EAX, 4) 99 KVM_X86_CPU_FEATURE(HYPERV_CPUID_FEATURES, 0, EAX, 5) 101 KVM_X86_CPU_FEATURE(HYPERV_CPUID_FEATURES, 0, EAX, 6) 103 KVM_X86_CPU_FEATURE(HYPERV_CPUID_FEATURES, 0, EAX, 7) 105 KVM_X86_CPU_FEATURE(HYPERV_CPUID_FEATURES, 0, EAX, 8) 107 KVM_X86_CPU_FEATURE(HYPERV_CPUID_FEATURES, 0, EAX, 9) [all …]
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H A D | processor.h | 166 #define X86_FEATURE_XTILECFG KVM_X86_CPU_FEATURE(0xD, 0, EAX, 17) 167 #define X86_FEATURE_XTILEDATA KVM_X86_CPU_FEATURE(0xD, 0, EAX, 18) 168 #define X86_FEATURE_XSAVES KVM_X86_CPU_FEATURE(0xD, 1, EAX, 3) 169 #define X86_FEATURE_XFD KVM_X86_CPU_FEATURE(0xD, 1, EAX, 4) 190 #define X86_FEATURE_SEV KVM_X86_CPU_FEATURE(0x8000001F, 0, EAX, 1) 191 #define X86_FEATURE_SEV_ES KVM_X86_CPU_FEATURE(0x8000001F, 0, EAX, 3) 196 #define X86_FEATURE_KVM_CLOCKSOURCE KVM_X86_CPU_FEATURE(0x40000001, 0, EAX, 0) 197 #define X86_FEATURE_KVM_NOP_IO_DELAY KVM_X86_CPU_FEATURE(0x40000001, 0, EAX, 1) 198 #define X86_FEATURE_KVM_MMU_OP KVM_X86_CPU_FEATURE(0x40000001, 0, EAX, 2) 199 #define X86_FEATURE_KVM_CLOCKSOURCE2 KVM_X86_CPU_FEATURE(0x40000001, 0, EAX, 3) [all …]
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/openbmc/linux/tools/arch/x86/kcpuid/ |
H A D | cpuid.csv | 5 0, 0, EAX, 31:0, max_basic_leafs, Max input value for supported subleafs 8 1, 0, EAX, 3:0, stepping, Stepping ID 9 1, 0, EAX, 7:4, model, Model 10 1, 0, EAX, 11:8, family, Family ID 11 1, 0, EAX, 13:12, processor, Processor Type 12 1, 0, EAX, 19:16, model_ext, Extended Model ID 13 1, 0, EAX, 27:20, family_ext, Extended Family ID 92 4, 0, EAX, 4:0, cache_type, Cache type like instr/data or unified 93 4, 0, EAX, 7:5, cache_level, Cache Level (starts at 1) 94 4, 0, EAX, 8, cache_self_init, Cache Self Initialization [all …]
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/openbmc/linux/arch/x86/um/ |
H A D | ptrace_32.c | 63 [EAX] = HOST_AX, 86 case EAX: in putreg() 160 case EAX: in getreg()
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H A D | user-offsets.c | 26 DEFINE(HOST_AX, EAX); in foo()
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/openbmc/linux/Documentation/virt/kvm/x86/ |
H A D | errata.rst | 23 Unlike most other CPUID feature bits, CPUID[EAX=7,ECX=0]:EBX[6] 24 (FDP_EXCPTN_ONLY) and CPUID[EAX=7,ECX=0]:EBX]13] (ZERO_FCS_FDS) are
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/openbmc/linux/arch/x86/include/uapi/asm/ |
H A D | ptrace-abi.h | 13 #define EAX 6 macro
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/openbmc/linux/Documentation/arch/x86/ |
H A D | cpuinfo.rst | 51 checked at runtime in the respective CPUID leaf [EAX=f, ECX=0] bit EDX[1]. 55 [EAX=7, ECX=0] has 30 features and is dense, but the CPUID leaf [EAX=7, EAX=1]
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H A D | tsx_async_abort.rst | 116 (i.e. it will make CPUID(EAX=7).EBX{bit4} and 117 CPUID(EAX=7).EBX{bit11} read as 0).
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H A D | exception-tables.rst | 295 #. a) EAX becomes -EFAULT (== -14) 303 we set EAX to -EFAULT in the exception handler code. Well, the 307 return -EFAULT. GCC selected EAX to return this value.
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H A D | tdx.rst | 79 return values (in guest EAX/EBX/ECX/EDX) are configurable by the
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/openbmc/u-boot/arch/x86/include/asm/ |
H A D | ptrace.h | 12 #define EAX 6 macro
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/openbmc/linux/arch/x86/um/os-Linux/ |
H A D | mcontext.c | 17 COPY(EBX); COPY(EDX); COPY(ECX); COPY(EAX); in get_regs_from_mc()
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/openbmc/linux/Documentation/driver-api/thermal/ |
H A D | x86_pkg_temperature_thermal.rst | 9 (Verify using: CPUID.06H:EAX[bit 6] =1)
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/openbmc/openbmc/meta-openembedded/meta-oe/recipes-extended/redis/redis/ |
H A D | 0006-Define-correct-gregs-for-RISCV32.patch | 60 "EAX:%08lx EBX:%08lx ECX:%08lx EDX:%08lx\n"
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/openbmc/openbmc/meta-openembedded/meta-oe/recipes-extended/redis/redis-7.2.7/ |
H A D | 0006-Define-correct-gregs-for-RISCV32.patch | 60 "EAX:%08lx EBX:%08lx ECX:%08lx EDX:%08lx\n"
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/openbmc/qemu/target/i386/hvf/ |
H A D | x86_task.c | 42 tss->eax = EAX(env); in save_state_to_tss32()
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H A D | x86.h | 219 #define EAX(cpu) ERX(cpu, R_EAX) macro
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/openbmc/linux/arch/x86/boot/compressed/ |
H A D | mem_encrypt.S | 106 movl $0, %eax # Request CPUID[fn].EAX
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/openbmc/linux/Documentation/admin-guide/hw-vuln/ |
H A D | special-register-buffer-data-sampling.rst | 99 RNGDS_MITG_DIS (bit 0) is enumerated by CPUID.(EAX=07H,ECX=0).EDX[SRBDS_CTRL =
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/openbmc/qemu/tests/tcg/i386/ |
H A D | x86.csv | 192 "ADC EAX, imm32","ADCL imm32, EAX","adcl imm32, EAX","15 id","V","V","","operand32","rw,r","Y","32" 217 "ADD EAX, imm32","ADDL imm32, EAX","addl imm32, EAX","05 id","V","V","","operand32","rw,r","Y","32" 254 "AND EAX, imm32","ANDL imm32, EAX","andl imm32, EAX","25 id","V","V","","operand32","rw,r","Y","32" 380 "CLZERO EAX","CLZEROL EAX","clzerol EAX","0F 01 FC","V","V","CLZERO","amd,modrm_regonly,operand32",… 482 "CMP EAX, imm32","CMPL EAX, imm32","cmpl imm32, EAX","3D id","V","V","","operand32","r,r","Y","32" 794 "IN EAX, DX","INL DX, EAX","inl DX, EAX","ED","V","V","","operand32,operand64","w,r","Y","32" 795 "IN EAX, imm8u","INL imm8u, EAX","inl imm8u, EAX","E5 ib","V","V","","operand32,operand64","w,r","Y… 809 "INVLPGA EAX, ECX","INVLPGAL ECX, EAX","invlpgal ECX, EAX","0F 01 DF","V","V","SVM","amd,modrm_rego… 1135 "MOV moffs32, EAX","MOVL EAX, moffs32","movl EAX, moffs32","A3 cm","V","V","","operand32","w,r","Y"… 1138 "MOV EAX, moffs32","MOVL moffs32, EAX","movl moffs32, EAX","A1 cm","V","V","","operand32","w,r","Y"… [all …]
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/openbmc/qemu/qapi/ |
H A D | machine.json | 618 'data': [ 'EAX', 'EBX', 'ECX', 'EDX', 'ESP', 'EBP', 'ESI', 'EDI' ] } 625 # @cpuid-input-eax: Input EAX value for CPUID instruction for that
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/openbmc/libcper/specification/document/ |
H A D | cper-json-specification.tex | 276 cpuVersionInfo & uint64 & The CPU version information as reported by CPUID with EAX=1. On ARM, this… 372 eax & uint64 & Value of the EAX register resulting from a call to CPUID with EAX=1.\\ 374 ebx & uint64 & Value of the EBX register resulting from a call to CPUID with EAX=1.\\ 376 ecx & uint64 & Value of the ECX register resulting from a call to CPUID with EAX=1.\\ 378 edx & uint64 & Value of the EDX register resulting from a call to CPUID with EAX=1.\\ 571 eax & uint64 & The EAX register. Real maximum is \texttt{UINT32}, null extended to \texttt{UINT64}.…
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/openbmc/linux/tools/perf/Documentation/ |
H A D | perf-probe.txt | 202 On x86 systems %REG is always the short form of the register: for example %AX. %RAX or %EAX is not …
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/openbmc/qemu/docs/system/i386/ |
H A D | hyperv.rst | 202 This changes Hyper-V version identification in CPUID 0x40000002.EAX-EDX from the
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