| /openbmc/qemu/scripts/coccinelle/ |
| H A D | exec_rw_const.cocci | 14 expression E1, E2, E3, E4, E5;
17 - address_space_rw(E1, E2, E3, E4, E5, 0)
18 + address_space_rw(E1, E2, E3, E4, E5, false)
20 - address_space_rw(E1, E2, E3, E4, E5, 1)
21 + address_space_rw(E1, E2, E3, E4, E5, true)
24 - cpu_physical_memory_rw(E1, E2, E3, 0)
25 + cpu_physical_memory_rw(E1, E2, E3, false)
27 - cpu_physical_memory_rw(E1, E2, E3, 1)
28 + cpu_physical_memory_rw(E1, E2, E3, true)
42 expression E1, E2, E3, E4;
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| H A D | memory-region-housekeeping.cocci | 16 expression E1, E2, E3, E4, E5;
20 - memory_region_init_ram(E1, E2, E3, E4, E5);
21 + memory_region_init_rom(E1, E2, E3, E4, E5);
25 - memory_region_init_ram_nomigrate(E1, E2, E3, E4, E5);
26 + memory_region_init_rom_nomigrate(E1, E2, E3, E4, E5);
33 expression E1, E2, E3, E4, E5;
37 memory_region_init_ram@p(E1, E2, E3, E4, E5);
41 memory_region_init_ram_nomigrate@p(E1, E2, E3, E4, E5);
53 expression ROM, E1, E2, E3, E4;
57 memory_region_init_rom(ROM, E1, E2, E3, E4);
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| /openbmc/linux/scripts/coccinelle/misc/ |
| H A D | array_size_dup.cocci | 28 expression as.E1, as.E2, E3;
34 ... when != \(subE1\|subE2\) aop E3
57 expression as.E1, as.E2, E3;
63 ... when != \(subE1\|subE2\) aop E3
84 expression E1, E2, E3;
87 array3_size(E1, E2, E3)
92 expression subE3 <= as3.E3;
93 expression as3.E1, as3.E2, as3.E3, E4;
98 * E1 * E2 * E3@p1
101 * array3_size(E1, E2, E3)@p2
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| /openbmc/linux/scripts/coccinelle/api/alloc/ |
| H A D | zalloc-simple.cocci | 50 expression E1,E2,E3,E4;
73 - x = kmalloc_node(E1,E2,E3);
74 + x = kzalloc_node(E1,E2,E3);
76 - x = (T *)kmalloc_node(E1,E2,E3);
77 + x = kzalloc_node(E1,E2,E3);
79 - x = (T)kmalloc_node(E1,E2,E3);
80 + x = (T)kzalloc_node(E1,E2,E3);
82 - x = kmem_cache_alloc(E3,E4);
83 + x = kmem_cache_zalloc(E3,E4);
85 - x = (T *)kmem_cache_alloc(E3,E4);
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| /openbmc/linux/scripts/coccinelle/api/ |
| H A D | kstrdup.cocci | 32 expression flag,E1,E2,E3;
42 ... when != \(x = E3 \| from = E3 \| to = E3 \)
62 expression flag,E1,E2,E3;
72 ... when != \(x = E3 \| from = E3 \| to = E3 \)
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| /openbmc/linux/lib/ |
| H A D | locking-selftest.c | 290 static void name##_123(void) { E1(); E2(); E3(); } \
291 static void name##_132(void) { E1(); E3(); E2(); } \
292 static void name##_213(void) { E2(); E1(); E3(); } \
293 static void name##_231(void) { E2(); E3(); E1(); } \
294 static void name##_312(void) { E3(); E1(); E2(); } \
295 static void name##_321(void) { E3(); E2(); E1(); }
924 #define E3() \ macro
956 #undef E3
975 #define E3() \ macro
1006 #undef E3
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| /openbmc/linux/arch/m68k/fpsp040/ |
| H A D | skeleton.S | 84 | The provided code will clear the E3 exception (if pending),
145 bclrb #E3,E_BYTE(%a6) |clear and test E3 flag
182 bclrb #E3,E_BYTE(%a6) |clear and test E3 flag
208 bclrb #E3,E_BYTE(%a6) |clear and test E3 flag
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| H A D | x_unfl.S | 61 btstb #E3,E_BYTE(%a6)
95 btstb #E3,E_BYTE(%a6)
116 bclrb #E3,E_BYTE(%a6)
151 | If the exception bit set is E3, the exceptional operand from the
154 btstb #E3,E_BYTE(%a6)
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| H A D | gen_except.S | 168 | exception is to set the E1/E3 byte and clr the U flag.
170 | operr, and dz. commonE3 does this for E3 exceptions, which
182 bsetb #E3,E_BYTE(%a6) |set E3 flag
190 bsetb #E3,E_BYTE(%a6) |set E3 flag
300 bsetb #E3,E_BYTE(%a6) |set E3 flag
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| H A D | util.S | 103 btstb #E3,E_BYTE(%a6) |check for nu exception
328 | if E3
355 btstb #E3,E_BYTE(%a6)
423 btstb #E3,E_BYTE(%a6)
426 clrl %d0 |if E3, only opclass 0x0 is possible
436 | If E3, the format is extended.
444 btstb #E3,E_BYTE(%a6)
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| H A D | fpsp.h | 142 .set CMDREG3B,LV-48 | cmd reg for E3 exceptions (2 bytes)
189 .set E_BYTE,LV-28 | holds E1 and E3 bits (1 byte)
191 .set E3,1 | which bit is E3 flag
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| H A D | x_store.S | 38 btstb #E3,E_BYTE(%a6)
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| H A D | round.S | 504 btstb #E3,E_BYTE(%a6) |test for type E3 exception
505 beqs not_E3 |not type E3 exception
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| /openbmc/sdbusplus/ |
| H A D | .flake8 | 3 extend-ignore = E1, E2, E3, E501, W1, W2, W3, W5
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| /openbmc/linux/arch/arm64/boot/dts/renesas/ |
| H A D | r8a77990-ebisu.dts | 3 * Device Tree Source for the Ebisu board with R-Car E3
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| /openbmc/linux/drivers/gpu/drm/i915/ |
| H A D | intel_step.h | 46 func(E3) \
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| /openbmc/linux/Documentation/admin-guide/hw-vuln/ |
| H A D | processor_mmio_stale_data.rst | 37 Intel Xeon server E3) uncore implementation. The sideband response buffer is
47 Intel Xeon server E3) uncore implementation. Similar to the sideband response
68 the fill buffer. It is limited to the client (including Intel Xeon server E3)
75 the client (including Intel Xeon server E3) uncore implementation.
80 processors for the server market (excluding Intel Xeon E3 processors) are
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| /openbmc/linux/arch/arm/mach-omap1/ |
| H A D | Kconfig | 152 bool "Amstrad E3 (Delta)"
160 Support for the Amstrad E3 (codename Delta) videophone. Say Y here
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| /openbmc/qemu/target/loongarch/tcg/ |
| H A D | vec_helper.c | 1106 #define VSRAN(NAME, BIT, E1, E2, E3) \ argument
1119 Vk->E3(j + ofs * i) % BIT); \
1205 #define VSRLRN(NAME, BIT, E1, E2, E3) \ argument
1218 Vk->E3(j + ofs * i) % BIT); \
1228 #define VSRARN(NAME, BIT, E1, E2, E3) \ argument
1241 Vk->E3(j + ofs * i) % BIT); \
1375 #define VSSRLN(NAME, BIT, E1, E2, E3) \ in SSRLNS() argument
1388 Vk->E3(j + ofs * i) % BIT, \ in SSRLNS()
1423 #define VSSRAN(NAME, BIT, E1, E2, E3) \ argument
1436 Vk->E3(j + ofs * i) % BIT, \
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| /openbmc/linux/drivers/soc/renesas/ |
| H A D | Kconfig | 202 bool "ARM64 Platform support for R-Car E3"
206 This enables support for the Renesas R-Car E3 SoC.
371 bool "System Controller support for R-Car E3" if COMPILE_TEST
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| /openbmc/linux/sound/soc/ti/ |
| H A D | Kconfig | 127 tristate "SoC Audio support for Amstrad E3 (Delta) videophone"
133 connected to a handset and a speakerphone found on Amstrad E3 (Delta)
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| /openbmc/linux/drivers/input/serio/ |
| H A D | Kconfig | 224 tristate "Amstrad Delta (E3) mailboard support"
228 Say Y here if you have an E3 and want to use its mailboard,
231 When used for the E3 mailboard, a non-standard key table
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| /openbmc/linux/Documentation/fb/ |
| H A D | tgafb.rst | 11 - ZLxP-E3 (32bpp, 16 MB VRAM, Zbuffer)
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| /openbmc/linux/drivers/pinctrl/aspeed/ |
| H A D | pinctrl-aspeed-g5.c | 1345 #define E3 181 macro
1346 SIG_EXPR_LIST_DECL_SINGLE(E3, GPIOW5, GPIOW5, SIG_DESC_SET(SCUA0, 29));
1347 SIG_EXPR_LIST_DECL_SINGLE(E3, ADC5, ADC5);
1348 PIN_DECL_(E3, SIG_EXPR_LIST_PTR(E3, GPIOW5), SIG_EXPR_LIST_PTR(E3, ADC5));
1349 FUNC_GROUP_DECL(ADC5, E3);
2008 ASPEED_PINCTRL_PIN(E3),
2575 ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_DOWN, E3, E3, SCUA8, 9),
2576 ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE, E3, E3, SCUA8, 9),
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| /openbmc/linux/arch/arm/boot/dts/aspeed/ |
| H A D | aspeed-bmc-facebook-greatlakes.dts | 291 /*18E0-18E3*/ "","","","","","","","";
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