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Searched refs:DP_REG (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/drivers/video/
H A Dipu_regs.h400 #define DP_REG ((struct ipu_dp *)(IPU_CTRL_BASE_ADDR + \ macro
402 #define DP_COM_CONF() (&DP_REG->com_conf_sync)
403 #define DP_GRAPH_WIND_CTRL() (&DP_REG->graph_wind_ctrl_sync)
404 #define DP_CSC_A_0() (&DP_REG->csca_sync[0])
405 #define DP_CSC_A_1() (&DP_REG->csca_sync[1])
406 #define DP_CSC_A_2() (&DP_REG->csca_sync[2])
407 #define DP_CSC_A_3() (&DP_REG->csca_sync[3])
409 #define DP_CSC_0() (&DP_REG->csc_sync[0])
410 #define DP_CSC_1() (&DP_REG->csc_sync[1])
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dce/
H A Ddce_link_encoder.c93 #define DP_REG(reg)\ macro