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Searched refs:DP_CONFIG (Results 1 – 10 of 10) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/display/dc/dce/
H A Ddce_link_encoder.h54 SRI(DP_CONFIG, DP, id), \
88 SRI(DP_CONFIG, DP, id), \
163 uint32_t DP_CONFIG; member
H A Ddce_link_encoder.c603 REG_SET(DP_CONFIG, 0, in configure_encoder()
617 REG_SET(DP_CONFIG, 0, in dce60_configure_encoder()
/openbmc/linux/drivers/mtd/nand/
H A Decc-mxic.c27 #define DP_CONFIG 0x00 macro
178 reg = readl(mxic->regs + DP_CONFIG); in mxic_ecc_disable_engine()
180 writel(reg, mxic->regs + DP_CONFIG); in mxic_ecc_disable_engine()
187 reg = readl(mxic->regs + DP_CONFIG); in mxic_ecc_enable_engine()
189 writel(reg, mxic->regs + DP_CONFIG); in mxic_ecc_enable_engine()
298 writel(ECC_TYP(idx), mxic->regs + DP_CONFIG); in mxic_ecc_init_ctx()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn301/
H A Ddcn301_dio_link_encoder.h37 SRI(DP_CONFIG, DP, id), \
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn30/
H A Ddcn30_dio_link_encoder.h36 SRI(DP_CONFIG, DP, id), \
/openbmc/u-boot/drivers/video/tegra124/
H A Dsor.c282 reg_val = tegra_sor_readl(sor, DP_CONFIG(sor->portnum)); in tegra_dc_sor_set_dp_mode()
298 tegra_sor_writel(sor, DP_CONFIG(sor->portnum), reg_val); in tegra_dc_sor_set_dp_mode()
592 DUMP_REG(DP_CONFIG(0)); in dump_sor_reg()
593 DUMP_REG(DP_CONFIG(1)); in dump_sor_reg()
H A Dsor.h646 #define DP_CONFIG(i) (0x58 + (i)) macro
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn10/
H A Ddcn10_link_encoder.h47 SRI(DP_CONFIG, DP, id), \
88 uint32_t DP_CONFIG; member
H A Ddcn10_link_encoder.c491 REG_SET(DP_CONFIG, 0, in enc1_configure_encoder()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn32/
H A Ddcn32_resource.h326 SRI_ARR(TMDS_DCBALANCER_CONTROL, DIG, id), SRI_ARR(DP_CONFIG, DP, id), \