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Searched refs:DPU_CLK_CTRL_DMA2 (Results 1 – 13 of 13) sorted by relevance

/openbmc/linux/drivers/gpu/drm/msm/disp/dpu1/catalog/
H A Ddpu_6_2_sc7180.h27 [DPU_CLK_CTRL_DMA2] = { .reg_off = 0x2c4, .bit_off = 8 },
83 .clk_ctrl = DPU_CLK_CTRL_DMA2,
H A Ddpu_6_4_sm6350.h29 [DPU_CLK_CTRL_DMA2] = { .reg_off = 0x2c4, .bit_off = 8 },
90 .clk_ctrl = DPU_CLK_CTRL_DMA2,
H A Ddpu_7_2_sc7280.h27 [DPU_CLK_CTRL_DMA2] = { .reg_off = 0x2c4, .bit_off = 8 },
88 .clk_ctrl = DPU_CLK_CTRL_DMA2,
H A Ddpu_3_0_msm8998.h35 [DPU_CLK_CTRL_DMA2] = { .reg_off = 0x2c4, .bit_off = 8 },
124 .clk_ctrl = DPU_CLK_CTRL_DMA2,
H A Ddpu_4_0_sdm845.h35 [DPU_CLK_CTRL_DMA2] = { .reg_off = 0x2bc, .bit_off = 8 },
122 .clk_ctrl = DPU_CLK_CTRL_DMA2,
H A Ddpu_6_0_sm8250.h32 [DPU_CLK_CTRL_DMA2] = { .reg_off = 0x2bc, .bit_off = 8 },
130 .clk_ctrl = DPU_CLK_CTRL_DMA2,
H A Ddpu_7_0_sm8350.h32 [DPU_CLK_CTRL_DMA2] = { .reg_off = 0x2bc, .bit_off = 8 },
130 .clk_ctrl = DPU_CLK_CTRL_DMA2,
H A Ddpu_5_0_sm8150.h35 [DPU_CLK_CTRL_DMA2] = { .reg_off = 0x2bc, .bit_off = 8 },
131 .clk_ctrl = DPU_CLK_CTRL_DMA2,
H A Ddpu_8_1_sm8450.h33 [DPU_CLK_CTRL_DMA2] = { .reg_off = 0x2bc, .bit_off = 8 },
131 .clk_ctrl = DPU_CLK_CTRL_DMA2,
H A Ddpu_5_1_sc8180x.h35 [DPU_CLK_CTRL_DMA2] = { .reg_off = 0x2bc, .bit_off = 8 },
130 .clk_ctrl = DPU_CLK_CTRL_DMA2,
H A Ddpu_9_0_sm8550.h33 [DPU_CLK_CTRL_DMA2] = { .reg_off = 0x28330, .bit_off = 0 },
132 .clk_ctrl = DPU_CLK_CTRL_DMA2,
H A Ddpu_8_0_sc8280xp.h33 [DPU_CLK_CTRL_DMA2] = { .reg_off = 0x2bc, .bit_off = 8 },
130 .clk_ctrl = DPU_CLK_CTRL_DMA2,
/openbmc/linux/drivers/gpu/drm/msm/disp/dpu1/
H A Ddpu_hw_catalog.h458 DPU_CLK_CTRL_DMA2, enumerator