Searched refs:DPLL_CTRL (Results 1 – 2 of 2) sorted by relevance
| /openbmc/qemu/include/hw/misc/ |
| H A D | xlnx-zynqmp-crf.h | 49 REG32(DPLL_CTRL, 0x2c)
50 FIELD(DPLL_CTRL, POST_SRC, 24, 3)
51 FIELD(DPLL_CTRL, PRE_SRC, 20, 3)
52 FIELD(DPLL_CTRL, CLKOUTDIV, 17, 1)
53 FIELD(DPLL_CTRL, DIV2, 16, 1)
54 FIELD(DPLL_CTRL, FBDIV, 8, 7)
55 FIELD(DPLL_CTRL, BYPASS, 3, 1)
56 FIELD(DPLL_CTRL, RESET, 0, 1)
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| /openbmc/linux/drivers/gpu/drm/gma500/ |
| H A D | oaktrail_hdmi.c | 79 #define DPLL_CTRL 0x6000 macro
295 dpll = REG_READ(DPLL_CTRL); in oaktrail_crtc_hdmi_mode_set()
297 REG_WRITE(DPLL_CTRL, dpll | (DPLL_PWRDN | DPLL_RESET)); in oaktrail_crtc_hdmi_mode_set()
311 dpll = REG_READ(DPLL_CTRL); in oaktrail_crtc_hdmi_mode_set()
314 REG_WRITE(DPLL_CTRL, 0x00000008); in oaktrail_crtc_hdmi_mode_set()
317 REG_WRITE(DPLL_CTRL, (dpll | (clock.np << DPLL_PDIV_SHIFT) | DPLL_ENSTAT | DPLL_DITHEN)); in oaktrail_crtc_hdmi_mode_set()
422 temp = REG_READ(DPLL_CTRL); in oaktrail_crtc_hdmi_dpms()
424 REG_WRITE(DPLL_CTRL, temp | (DPLL_PWRDN | DPLL_RESET)); in oaktrail_crtc_hdmi_dpms()
436 temp = REG_READ(DPLL_CTRL); in oaktrail_crtc_hdmi_dpms()
438 REG_WRITE(DPLL_CTRL, temp & ~(DPLL_PWRDN | DPLL_RESET)); in oaktrail_crtc_hdmi_dpms()
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