Home
last modified time | relevance | path

Searched refs:DPDMA_DSCR_NEXT_ADDR_CH (Results 1 – 1 of 1) sorted by relevance

/openbmc/qemu/hw/dma/
H A Dxlnx_dpdma.c77 #define DPDMA_DSCR_NEXT_ADDR_CH(n) ((0x020C + n * 0x100) >> 2) macro
308 + s->registers[DPDMA_DSCR_NEXT_ADDR_CH(channel)]; in xlnx_dpdma_descriptor_next_address()
344 s->registers[DPDMA_DSCR_NEXT_ADDR_CH(channel)] = desc->next_descriptor; in xlnx_dpdma_update_desc_info()
453 case DPDMA_DSCR_NEXT_ADDR_CH(0): in xlnx_dpdma_write()
454 case DPDMA_DSCR_NEXT_ADDR_CH(1): in xlnx_dpdma_write()
455 case DPDMA_DSCR_NEXT_ADDR_CH(2): in xlnx_dpdma_write()
456 case DPDMA_DSCR_NEXT_ADDR_CH(3): in xlnx_dpdma_write()
457 case DPDMA_DSCR_NEXT_ADDR_CH(4): in xlnx_dpdma_write()
458 case DPDMA_DSCR_NEXT_ADDR_CH(5): in xlnx_dpdma_write()