| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dce/ |
| H A D | dce_hwseq.h | 234 SR(DOMAIN1_PG_CONFIG), \
278 SR(DOMAIN1_PG_CONFIG), \
342 SR(DOMAIN1_PG_CONFIG), \
450 SR(DOMAIN1_PG_CONFIG), \
502 SR(DOMAIN1_PG_CONFIG), \
599 uint32_t DOMAIN1_PG_CONFIG; member
790 HWS_SF(, DOMAIN1_PG_CONFIG, DOMAIN1_POWER_FORCEON, mask_sh), \
791 HWS_SF(, DOMAIN1_PG_CONFIG, DOMAIN1_POWER_GATE, mask_sh), \
825 HWS_SF(, DOMAIN1_PG_CONFIG, DOMAIN1_POWER_FORCEON, mask_sh), \
826 HWS_SF(, DOMAIN1_PG_CONFIG, DOMAIN1_POWER_GATE, mask_sh), \
[all …]
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn302/ |
| H A D | dcn302_hwseq.c | 52 if (REG(DOMAIN1_PG_CONFIG) == 0) in dcn302_dpp_pg_control()
57 REG_UPDATE(DOMAIN1_PG_CONFIG, in dcn302_dpp_pg_control()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn31/ |
| H A D | dcn31_hwseq.c | 358 REG_UPDATE(DOMAIN1_PG_CONFIG, DOMAIN_POWER_FORCEON, force_on); in dcn31_enable_power_gating_plane()
459 REG_SET(DOMAIN1_PG_CONFIG, 0, DOMAIN_POWER_GATE, power_gate); in dcn31_hubp_pg_control()
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| H A D | dcn31_resource.c | 710 SR(DOMAIN1_PG_CONFIG), \
744 HWS_SF(, DOMAIN1_PG_CONFIG, DOMAIN_POWER_FORCEON, mask_sh), \
745 HWS_SF(, DOMAIN1_PG_CONFIG, DOMAIN_POWER_GATE, mask_sh), \
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn316/ |
| H A D | dcn316_resource.c | 706 SR(DOMAIN1_PG_CONFIG), \
740 HWS_SF(, DOMAIN1_PG_CONFIG, DOMAIN_POWER_FORCEON, mask_sh), \
741 HWS_SF(, DOMAIN1_PG_CONFIG, DOMAIN_POWER_GATE, mask_sh), \
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn314/ |
| H A D | dcn314_hwseq.c | 323 REG_UPDATE(DOMAIN1_PG_CONFIG, DOMAIN_POWER_FORCEON, force_on); in dcn314_enable_power_gating_plane()
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| H A D | dcn314_resource.c | 716 SR(DOMAIN1_PG_CONFIG), \
752 HWS_SF(, DOMAIN1_PG_CONFIG, DOMAIN_POWER_FORCEON, mask_sh), \
753 HWS_SF(, DOMAIN1_PG_CONFIG, DOMAIN_POWER_GATE, mask_sh), \
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn315/ |
| H A D | dcn315_resource.c | 709 SR(DOMAIN1_PG_CONFIG), \
743 HWS_SF(, DOMAIN1_PG_CONFIG, DOMAIN_POWER_FORCEON, mask_sh), \
744 HWS_SF(, DOMAIN1_PG_CONFIG, DOMAIN_POWER_GATE, mask_sh), \
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn321/ |
| H A D | dcn321_resource.c | 556 SR(DOMAIN1_PG_CONFIG), \
591 HWS_SF(, DOMAIN1_PG_CONFIG, DOMAIN_POWER_FORCEON, mask_sh), \
592 HWS_SF(, DOMAIN1_PG_CONFIG, DOMAIN_POWER_GATE, mask_sh), \
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn32/ |
| H A D | dcn32_resource.c | 557 SR(DOMAIN1_PG_CONFIG), \
592 HWS_SF(, DOMAIN1_PG_CONFIG, DOMAIN_POWER_FORCEON, mask_sh), \
593 HWS_SF(, DOMAIN1_PG_CONFIG, DOMAIN_POWER_GATE, mask_sh), \
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| H A D | dcn32_hwseq.c | 146 REG_UPDATE(DOMAIN1_PG_CONFIG, DOMAIN_POWER_FORCEON, force_on); in dcn32_enable_power_gating_plane()
177 REG_SET(DOMAIN1_PG_CONFIG, 0, DOMAIN_POWER_GATE, power_gate); in dcn32_hubp_pg_control()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn20/ |
| H A D | dcn20_hwseq.c | 213 REG_UPDATE(DOMAIN1_PG_CONFIG, DOMAIN1_POWER_FORCEON, force_on); in dcn20_enable_power_gating_plane()
442 if (REG(DOMAIN1_PG_CONFIG) == 0) in dcn20_dpp_pg_control()
447 REG_UPDATE(DOMAIN1_PG_CONFIG, in dcn20_dpp_pg_control()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn10/ |
| H A D | dcn10_hw_sequencer.c | 569 REG_UPDATE(DOMAIN1_PG_CONFIG, DOMAIN1_POWER_FORCEON, force_on); in dcn10_enable_power_gating_plane()
627 if (REG(DOMAIN1_PG_CONFIG) == 0) in dcn10_dpp_pg_control()
632 REG_UPDATE(DOMAIN1_PG_CONFIG, in dcn10_dpp_pg_control()
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