Searched refs:DMAR_REG_SIZE (Results 1 – 2 of 2) sorted by relevance
| /openbmc/qemu/include/hw/i386/ |
| H A D | intel_iommu.h | 45 #define DMAR_REG_SIZE 0x230 macro
257 uint8_t csr[DMAR_REG_SIZE]; /* register values */
258 uint8_t wmask[DMAR_REG_SIZE]; /* R/W bytes */
259 uint8_t w1cmask[DMAR_REG_SIZE]; /* RW1C(Write 1 to Clear) bytes */
260 uint8_t womask[DMAR_REG_SIZE]; /* WO (write only - read returns 0) */
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| /openbmc/qemu/hw/i386/ |
| H A D | intel_iommu.c | 417 assert(mesg_data_reg < DMAR_REG_SIZE); in vtd_generate_interrupt()
418 assert(mesg_addr_reg < DMAR_REG_SIZE); in vtd_generate_interrupt()
2973 if (addr + size > DMAR_REG_SIZE) { in vtd_mem_read()
3026 if (addr + size > DMAR_REG_SIZE) { in vtd_mem_write()
3382 VMSTATE_UINT8_ARRAY(csr, IntelIOMMUState, DMAR_REG_SIZE),
4162 memset(s->csr, 0, DMAR_REG_SIZE); in vtd_init()
4163 memset(s->wmask, 0, DMAR_REG_SIZE); in vtd_init()
4164 memset(s->w1cmask, 0, DMAR_REG_SIZE); in vtd_init()
4165 memset(s->womask, 0, DMAR_REG_SIZE); in vtd_init()
4381 "intel_iommu", DMAR_REG_SIZE); in vtd_realize()
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